Job Area:Engineering Group, Engineering Group > SoC Architecture
General Summary:Qualcomm's Data Center AI Architecture team defines next-generation cloud AI system-on-chip (SoC) and systems for generative AI inference workloads that demand exceptional compute, memory bandwidth, capacity, and system scalability.
We are seeking exceptional architects to help shape multiple generations of AI accelerators and complete data center systems, with a strong focus on SoC, memory, and system architecture and technologies.
If you are passionate about solving complex architecture challenges in a collaborative, multidisciplinary environment while contributing to building a substantial new business for one of the leading system-on-chip and computer architecture companies in the industry, we want to hear from you.
Minimum Qualifications:• Bachelor's degree in Electrical Engineering, Computer Science, or related field and 4+ years of Systems Engineering or related work experience.
OR
Master's degree in Electrical Engineering, Computer Science, or related field and 3+ years of Systems Engineering or related work experience.
OR
PhD in Electrical Engineering, Computer Science, or related field and 2+ years of Systems Engineering or related work experience.
• 2+ years of experience in one or more system architecture technology areas and products (e.g., Power System, Shared Resource Management, Limits/Thermal Management, Hardware Islands).
In this role, you will:- Partner across architecture, design, systems, product, software, platform, and customer teams to deliver market-leading data center systems
- Translate product and workload requirements into SoC and system specifications, and drive feature-set requirements into technology, IP, platform, and software teams
- Execute SoC and system architecture studies, product definition, and implementation guidance, quantifying performance, power, area, cost, capacity, memory bandwidth, network topology/bandwidth/latency, and scalability tradeoffs while driving analysis methods and tools
- Follow designs through implementation and production, correlate observed system performance with models and targets, identify root causes of gaps, and drive performance to closure
- Execute competitive analysis across SoC, platform, system, compute, memory, data center networking, software, and deployment considerations
- Support and mentor technical contributors and generate innovations and patents
Preferred Qualifications:- MS or PhD in EE, ECE, CE, CS, or a related field
- 7+ years of relevant experience in SoC, platform, or system architecture; AI accelerators; memory architecture; or memory technologies
- Ability to collaborate across teams, build alignment, and contribute to technical direction
- Computer and system architecture expertise spanning one or more of processors, accelerators, memory systems, data center network fabrics, interconnects, hardware/software interfaces, platform topology, and SoC and system implementation tradeoffs
- Ability to execute quantitative SoC, system, and competitive studies using high-level calculators, spreadsheets, analytical models, profilers, and functional or performance simulators
- Experience developing architecture methodologies, tools, and analysis frameworks and translating findings into actionable recommendations
- Experience correlating modeled and measured system performance, isolating hardware and software bottlenecks, and driving cross-functional performance closure through production
- Excellent technical communication, documentation, and interpersonal skills, including presenting to technical and business stakeholders
- Self-directed execution, mentorship of others, and rigorous attention to accuracy
Additional Qualifications:- Understanding of generative AI and machine-learning workloads, especially Large Language Model inference and accelerator bottlenecks
- Experience in processor, accelerator, or system architecture, including ISA design, microarchitecture, performance modeling, system topology, scale-up or scale-out networks, or hardware/software co-design
- Knowledge of DRAM and memory-controller architecture, bandwidth, latency, and power tradeoffs, protocols such as LPDDR, HBM, DDR, or GDDR, and emerging technologies such as processing-in-memory, processing-near-memory, or 3D integration
- Expertise in one or more data center SoC or system technologies such as RAS, ECC, security, encryption, Ethernet or InfiniBand networking, RDMA, network interface controllers, switches, congestion control, chip-to-chip or die-to-die protocols, chiplets, PHYs, power and thermals, advanced packaging, platform management, or system scalability
- Programming ability for architecture modeling and automation; object-oriented C++ and Python preferred
- Fluent with using AI to accelerate workflows
Pay range and Other Compensation & Benefits: $155,400.00 - $233,200.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
