Job DescriptionWe are seeking an ASIC Design Engineer with a solid ASIC/FPGA design strategy & development and debugging skills.
Responsibilities• Participation in development and verification of the world leading SoCs based on latest technology ASICs and FPGAs
• Participation in algorithm development, fixed-point modelling and fixed-point performance verification
• Identifying technical issues and cooperating with senior engineers and other relevant internal groups to resolve those
• Supporting HW/SW bring-up and debug
Qualifications- Work with system architect to define micro-architecture and RTL development
- Design size/timing/power optimization via micro-architecture/RTL/Synthesis
- Working as independent contributor in development and verification of the world leading SoCs based on latest technology ASICs and FPGAs
- Working with verification engineers on test plan based on functional requirements as well as applicable standards requirements
- Working with experts of different areas to ensure the most competitive solutions
- Cooperating with system engineers, HW/SW development, suppliers and other relevant functions to solve technical issues
- Supporting HW/SW bring-up and debug
About the TeamSome of our benefits in US:
- Corporate Retirement Savings Plan
- Health and dental benefits
- Short-term disability, and long-term disability
- Life insurance, and AD&D - Company paid 2x base pay
- Optional or Supplemental life and AD&D insurance (Employee/Spouse/Child)
- Paid time off for holidays and Vacation
- Employee Stock Purchase Plan
- Tuition Assistance Plan
- Adoption assistance
- Employee Assistance Program/Work Life Resource Program
The above benefits exclude students.
Disclaimer for US/CanadaNokia Maintains broad annual base salary ranges for its roles in order to account for variations in knowledge, skills, experience and market conditions, and with consideration to internal peer equity. Check the salary ranges in the job info section for this role.
All North America job posts will post for a minimum of 7 calendar days and up to 180 days or until candidate/s identified.