Bachelor's or Master's Degree in Electrical Engineering
Good understanding of synchronous material design concepts
Knowledge of VHDL language
Familiarity with Xilinx or Altera FPGA technologies
Recognized for superior learning capabilities
Functional English proficiency, particularly in writing
Assets: Knowledge of hertzian transmission technology (Modem, DSP), basic Linux commands, Matlab, System Verilog or object-oriented languages, and script languages (Perl, TCL).
Responsibilities
Analyze and understand requirements to draft a comprehensive design description
Design and implement algorithms using VHDL
Conduct simulations using ModelSim
Collaborate closely with verification specialists for effective debugging and corrections
Execute synthesis and implementation testing
Provide management with project timelines and tracking for progress and unforeseen tasks
Participate in design reviews and offer constructive feedback.
Full Job Description
RESPONSABILIT9S :
Analyser et comprendre les requis dans le but de faire de la conception et de re9diger la la description.
Concevoir et imple9menter les algorithmes en VHDL.
Effectuer les simulations ne9cessaires avec ModelSim.
Travailler en e9troite collaboration avec le spe9cialiste en ve9rification, afin d'effectuer efficacement la boucle ite9rative de debug/correction.
Effectuer des tests de synthe8se et d'imple9mentation.
Participer aux re9visions de conception et fournir des commentaires approprie9s.
QUALIFICATIONS:
Bac ou Maitrise en Ge9nie c9lectrique
Une bonne compre9hension des concepts de conception mate9rielle synchrone
Connaissances du langage VHDL.
Connaissance des technologies de FPGA Xilinx ou Altera.
Reconnue pour sa capacite9 supe9rieure d'apprentissage.
Connaissance fonctionnelle de l'anglais (surtout en e9criture).
Atouts:
Technologie de transmission hertzienne (Modem, DSP).
Commandes Linux de base, Script Linux.
Matlab.
System Verilog ou Langage Oriente Objet.
Connaissance de langage de script tell Perl, TCL.
RESPONSABILITIES:
Analyze and understand the requirements in order to design and draft the description.
Design and implement the algorithms in VHDL.
Perform the necessary simulations with ModelSim.
Work closely with the verification specialist to efficiently perform the iterative debug/correction loop.
Perform synthesis and implementation testing.
Provide management with timelines, project progress tracking and unplanned tasks.
Participate in design reviews and provide appropriate feedback.
QUALIFICATIONS:
Bachelor's or Master's Degree in electrical engineering.
A good understanding of synchronous material design concepts.
Knowledge of VHDL language.
Knowledge of Xilinx or Altera FPGA technologies.
Recognized for his/her superior learning skills.
Functional knowledge of English (especially written).
