Location: Irvine, CA, United States
Date Posted: Sep 29, 2026
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Description Overview Synaptics is looking for a Staff Product Engineer to join our dynamic and growing organization. You will be responsible for supporting new product introduction and the continuous care of mass production, sustaining & yield monitoring, and improvement during production. You will also be responsible for direct communication with the design team and the management of the ASIC supply chain vendors: wafer foundries and test houses. This position reports to the Director, Product and Test Engineering.
The typical base pay range for this position is USD $121,000 - $191,400 per year. Individual pay is determined by many factors including work location, job-related skills, experience, and relevant education or training. This position is also eligible for a discretionary annual performance bonus, equity, and other benefits. Note that compensation listed in US role postings reflect the base salary only, and does not include bonus, equity, or benefits.
Responsibilities & Competencies Job Duties
- Manage all aspects of new product introduction, from concept through volume ramp into mass production and full life cycle
- Scheduling all aspects of product development, tracking progress, and keeping records
- Defining test, PVT characterization, and silicon/package qualification plans for new products
- Engaging in design and testability reviews to promote low-cost implementations while also ensuring DFT targets are met
- Creating a qualification plan tailored to consumer, industrial, or automotive standards and ensuring its successful execution
- Designing qualification test hardware, such as ESD, HTOL & bHAST boards
- Driving bench-to-ATE correlation for key parameters
- Ensuring new devices meet yield, test coverage, quality, and cost targets
- Defining yield and manufacturing specs for wafer sort, final test, and system-level test
- Setting robust test limits that ensure proper test screening of outgoing devices
- Validating new test programs, test hardware, ATEs, and OSATs via GRR analysis
- Evaluating customer returns, driving the necessary failure analysis, and identifying test coverage gaps to bring issues to a close
- Driving continuous improvement to meet yield, test time, quality and dppm targets
- Striving for the highest device quality at the lowest product cost
- Dispositioning production lots based on yield analysis, bin yield limits, fab PCM data, and other metrics
- Summarizing yield trends and improvement efforts in regular meetings with the cross-functional team and management
- Engaging with Marketing team to support business case development of new products as well as early samples commitments
Competencies
- Strong understanding of HTOL, BHAST, and ESD qualification methodologies, including board designs, pattern conversions and bring-ups
- Proactive, self-starter, able to work independently in a fast-paced environment
- Well organized with strong attention to detail; proactively ensures work is accurate
- Positive attitude and work ethic; unafraid to ask questions and explore new ideas
- Solid project management skills with the ability to prioritize tasks and drive multiple projects at various stages of development
- Resourceful and able to solve complex problems through practical use of technology and a solid understanding of product architecture
- Analytical and able to make informed decisions based on experience and data
- S trong team player with the ability to work collaboratively within a diverse global cross-functional tea m
- Good communication & presentation skills in English; ability to run cross-functional meetings
Qualifications (Requirements)
- Bachelor's degree (masters preferred) in Electrical Engineering or related field or equivalent
- 8+ years of experience in semiconductor Product Engineering
- Broad understanding of NPI flow, silicon test, reliability, quality, and failure analysis techniques
- Expertise in statistical analysis and experience with data analysis software such as PDF tools Exensio, GA, NPI, or equivalent
- Knowledgeable in PVT characterization, guard-banding, compliance matrix, and characterization report creation
- Expert in silicon qualification with strong working knowledge of standards like JESD47 and AEC-Q100
- Familiarity with silicon and package qualification for consumer and automotive markets, with the ability to create associated reports
- Experience on ATE test platforms such as Teradyne UltraFLEX, Teradyne J750, or Advantest 93k
- Ability to support chip-level failure analysis and RMAs
- Ability to travel internationally up to 10%
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