Master's degree with 5+ years or PhD with 3+ years in Electrical Engineering, Photonics, Physics, or related field.
Deep understanding of photonic device physics and device simulation experience.
Experience building behavioral models for circuit simulators like Lumerical INTERCONNECT or Cadence.
Proficient in Python for modeling, automation, and data analysis, with knowledge of scientific libraries.
Experience with Python-based layout tools and layout design.
Responsibilities
Develop and maintain a library of pcells using Python frameworks, ensuring synchronization between layouts and models.
Create and verify physics-based behavior models for both passive and active devices.
Design test structures and develop test plans for device performance extraction, collaborating with test engineers.
Validate models against lab measurements, performing data fitting and statistical analysis.
Implement regression testing and Continuous Integration (CI) pipelines for PDK updates.
Collaborate with design, analog, digital, and architecture engineers for impactful tape-outs.
Benefits
Comprehensive Health Care Plan (Medical, Dental & Vision)
Retirement Savings Matching Program
Life Insurance (Basic, Voluntary & AD&D)
Generous Time Off (Vacation, Sick & Public Holidays)
Paid Family Leave
Short Term & Long Term Disability
Training & Development
Commuter Benefits
Flexible, hybrid workplace model
Equity grants (applicable to full-time employees)
Full Job Description
We are hiring a Photonics PDK Modeling Engineer to join our team. In this role, you will develop our internal Process Design Kit (PDK). You will act as the architect of our component library, bridging the gap between photonics device design and system-level verification. You will develop robust compact models for active and passive components, ensuring that our simulation environment accurately predicts the behavior of our physical layouts. You will work heavily in Python, EDA tools, applying software engineering rigor to the challenges of photonic hardware design. Responsibilities
Develop and maintain a library of pcells using Python-based frameworks. Ensure strict synchronization between physical layout, logical netlists, and behavioral models.
Create and verify physics based behavior models for passive and active devices.
Design test structure, develop test plans for device FOMs extraction. Work with test engineers to get silicon data.
Validate models against lab measurements. Perform data fitting and statistical analysis to align model parameters with real-world silicon performance.
Automated Verification: Implement regression testing and Continuous Integration (CI) pipelines to ensure PDK updates do not break legacy designs or connectivity logic.
Actively collaborate with design, analog, digital and architecture engineers to deliver high impact tape-outs
Qualifications
Master's +5 years experience or PhD +3 years experience in Electrical Engineering, Photonics, Physics, or related field.
Deep understanding of photonic device physics and experience in device simulation.
Experience building behavioral models for circuit simulators (e.g., Lumerical INTERCONNECT, Cadence, Synopsys OptSim, or custom Python solvers).
Experienced in Python for modeling, automation, and data analysis. Comfortable with object-oriented programming and scientific libraries (NumPy, SciPy).
Python based layout experience.
Demonstrated strong problem solving skills for problems without obvious solutions
Preferred Qualifications
Proficiency with python-based layout tools such as gdstk, GDSFactory, and KLayout
Experience with Python-native circuit simulation ecosystems (e.g., SAX, Photontorch, Simphony).
Experience with verilogA/spectre equivalent circuit modeling for photonics device
Prior experience in using foundry-provided process design kits (PDKs), adhering to specific design rules and constraints, well understanding of DRC, LVS, etc.
Experience working on large-scale designs using industry standard environments such as Cadence Virtuoso
Experience in taping out and testing large-scale photonic integrated circuits, including familiarity with relevant testing equipment and methodologies.
Possess strong project execution skills, demonstrating the ability to effectively manage multiple design priorities, adhere to project timelines, and meet critical milestones.
We offer competitive compensation. The base salary range for this role determined based on location, experience, educational background, and market data.
Salary Range: total compensation goes beyond base salary, it also includes a new hire equity grant, annual performance-based equity, and other rewards that recognize your impact and contribution.
$185,000-$220,000 USD
Benefits
Comprehensive Health Care Plan (Medical, Dental & Vision)
Retirement Savings Matching Program
Life Insurance (Basic, Voluntary & AD&D)
Generous Time Off (Vacation, Sick & Public Holidays)
Paid Family Leave
Short Term & Long Term Disability
Training & Development
Commuter Benefits
Flexible, hybrid workplace model
Equity grants (applicable to full-time employees)
Benefits eligibility may vary depending on your employment status and location.
