Your role
Key responsibilities in your new role
- Execute hands-on digital IP and SoC design, including micro-architecture refinement, RTL implementation, design documentation, integration support, and release readiness
- Develop high-quality, synthesizable RTL in SystemVerilog/Verilog for reusable, configurable, integration-ready IP blocks
- Translate IP and SoC roadmap requirements into design plans, RTL deliverables, milestones, risks, and closure actions
- Drive design quality closure through lint, CDC, RDC, synthesis, DFT checks, ATPG readiness, and related sign-off activities
- Debug and resolve design issues at block, integration, and system levels, working closely with Verification, Architecture, Physical Design, and System teams
- Support development and integration of Automotive Base-T1 Ethernet PHYs
- Use automated, configurable, generator-based RTL flows to improve reuse, scalability, consistency, and productivity
- Contribute to IP architecture and design trade-off discussions
Your profile
Qualifications and skills to help you succeed
- Bachelor's or Master's degree in Electrical, Electronics, or Computer Engineering, or a related field
- 3+ years of hands-on experience in semiconductor digital IP design and RTL development
- Solid SystemVerilog/Verilog RTL coding skills and a strong grasp of digital design fundamentals (FSMs, clock domain crossing, timing)
- Experience with micro-architecture definition, design documentation, integration support, and RTL release execution
- Working knowledge of front-end design flows (lint, CDC, synthesis)
- Experience with verification and debug activities, including analyzing simulation failures and working with verification teams
- Understanding of the chip development process
- Knowledge of Ethernet protocols or experience with networking IC development is preferred
- Scripting experience (Python, Tcl, Perl) or exposure to generator-based RTL flows
- Familiarity with automotive standards (e.g., ISO 26262 functional safety)
Salary pay information:
In line with local legal requirements, indicative salary ranges are disclosed for selected locations where applicable.
Location
Indicative salary range
San Jose, CA, United States
Wage range that the company expects to pay for a qualified candidate:
US$133,800 - US$184,000
In addition, all employees will be eligible to participate in an incentive plan.
