We are hiring a Digital Design Engineer to help develop an ASIC for the next-generation artificial intelligence computing architecture alongside a team of world-class scientists and engineers. If your passion is innovation, solving challenging technical problems, and doing impactful work, you should join our team and help build the world's first optical computers!
Responsibilities- Develop RTL (i.e. system Verilog) modules with DFT considerations for IC development
- Debug complex logic and mixed signal simulations
- Understand and integrate silicon photonic communication and compute technology into digital accelerator design
- Actively work with Architecture, Design Verification, Physical Design, Photonic, Analog and Software teams to realize high performance, low power designs in advanced technology nodes
- Create design specifications and documentation to facilitate collaboration with partner teams
- Generate documentation for modules, including functionality and timing
- Manage RTL implementation to achieve functionally correct, performant designs within project schedules by identifying, communicating and mitigating risks.
Qualifications- Bachelor's degree in Electrical or Computer Engineering (or related fields)
- At least 5 years of experience in ASIC design or a similar high-speed chip design with multiple successful tape outs
- Proficiency in SystemVerilog or Verilog for digital logic design
- Proven experience debugging complex logic and mixed-signal simulations using industry-standard EDA tools (e.g., Synopsys VCS, Cadence Xcelium, Questa, or equivalent mixed-signal co-simulation environments)
- Demonstrated track record of delivering high-performance, low-power digital designs in advanced semiconductor process nodes
Preferred Qualifications- Master's degree in Electrical or Computer Engineering (or related fields)
- Experience in communication protocols (e.g. PCIe)
- Knowledge of processor design, accelerators, and/or memory hierarchies
- Exposure to silicon photonics (SiPh), optical compute/interconnect architectures, or electro-optic interface integration.
- Strong scripting skills in Python, Perl, Tcl, or Bash to automate simulation and design workflows.
- Experience interfacing digital logic directly with analog mixed-signal (AMS) IP (e.g., SerDes, ADCs/DACs, optical transceivers)
We offer competitive compensation. The base salary range for this role determined based on location, experience, educational background, and market data.
Salary Range: total compensation goes beyond base salary, it also includes a new hire equity grant, annual performance-based equity, and other rewards that recognize your impact and contribution.
$154,000-$218,000 USD
Benefits- Comprehensive Health Care Plan (Medical, Dental & Vision)
- Retirement Savings Matching Program
- Life Insurance (Basic, Voluntary & AD&D)
- Generous Time Off (Vacation, Sick & Public Holidays)
- Paid Family Leave
- Short Term & Long Term Disability
- Training & Development
- Commuter Benefits
- Flexible, hybrid workplace model
- Equity grants (applicable to full-time employees)
Benefits eligibility may vary depending on your employment status and location.
