Sr. Principal DFT Engineer (AI2533)

SiMa Technologies

$231K — $358K *
Manufacturing & Automotive
15+ years of experience
Job Overview by Ladders

Qualifications

  • BSEE with 18+ years or MSEE/PhD with 16+ years of experience
  • Deep knowledge of DFT methodologies and execution processes
  • Extensive experience with advanced finFET technology
  • Proficient in hardware description languages including Verilog and System Verilog
  • Hands-on experience with EDA tools like Synopsys SMS/Testmax or Mentor Tessent
  • Strong problem-solving and debugging skills
  • Effective in cross-functional team settings with good communication skills

Responsibilities

  • Lead DFT initiatives at SiMa with technical expertise
  • Develop DFT architecture and methodologies for cutting-edge ICs
  • Execute DFT architectures in future SoCs at SiMa
  • Collaborate with DFT team to drive success and implementation
  • Integrate DFT strategies across hardware functions like RTL design and verification

Benefits

  • Eligibility for private company equity
  • Comprehensive employee benefits package
  • On-site presence in San Jose, CA for engagement with team
Full Job Description
Description

Job Title: Sr. Principal DFT Engineer

Job Location: San Jose, CA (This position requires a full-time, on-site presence in our San Jose, CA office)

Job ID: AI2533

Job Description:

Key Responsibilities:
  • Technical leadership across various DFT endeavors at SiMa.
  • DFT architecture and methodology development for latest industrial, robotic, and automotive ICs.
  • Responsible for the execution of above DFT architecture/methodology in future SiMa SoC(s).
  • Work closely with other members of DFT team to enable their success.
  • Work across all H/W functions (RTL design, verification, and physical design) towards the successful implementation of above DFT strategies.


Required Background:
  • BSEE with 18+ years of experience or MSEE/PhD with 16+ years of experience
  • Commanding knowledge of all aspects of DFT
  • Experience with end-to-end DFT execution from architecture to tape-out to pattern bringup across multiple ICs in advanced finFET technology.
  • In-depth knowledge of VLSI design as well as hardware description languages such as Verilog and System Verilog.
  • Deep hands-on experience with latest EDA tools like Synopsys SMS/Testmax or Mentor Tessent.
  • Good working knowledge of non-DFT EDA tools like VCS/Verdi, Fusion Compiler, PrimeTime, PrimePower, RedHawk, StarRC, etc. is preferred plus.
  • Strong problem solving and debug capabilities is must.
  • Should be proficient at working with cross functional and cross site teams.
  • Must possess good communication skills, be a self-driven individual, and a good team player.


Personal attributes:
Can-do attitude. Strong technical leadership attributes. Curious, creative, and good at solving problems. Execution and results oriented. Self-driven, Thinks Big and is highly accountable. Good communication skills.

The annual salary for this position ranges from $231,100 - $358,200. The actual annual salary offered will depend on several factors, including - among others - job-related skills, experience, technical expertise, qualifications, work location, and business needs. The annual salary range for this position is subject to change and may be adjusted in the future.

In addition to base salary, this role is also eligible for private company equity, and a comprehensive package of employee benefits. Please note that the salary ranges listed for U.S. roles reflect base salary only and do not include equity or other forms of compensation.

Similar Jobs

More Jobs at SiMa Technologies

More Manufacturing & Automotive Jobs

Find similar Sr. Principal DFT Engineer (AI2533) jobs: