M.S. or Ph.D. in Electrical Engineering focused on CMOS analog/mixed-signal IC design.
5+ years of IC development experience with advanced CMOS technology; familiarity with FinFET process.
Strong knowledge of analog/mixed-signal circuits including op-amps, regulators, and PLLs.
Proficient in EDA tools like Cadence Virtuoso and Synopsys Custom Compiler.
Hands-on experience from design to verification.
Responsibilities
Design analog and mixed-signal blocks specifically for SerDes technology.
Utilize CAD tools for circuit simulations and result analysis.
Collaborate with layout engineers on physical layout and conduct post-layout simulations.
Test and debug designs upon silicon return.
Prepare and maintain comprehensive design documentation.
Benefits
Discretionary bonus eligibility.
Equity options available.
Full range of medical benefits.
Full Job Description
Job description
Credo is seeking a Sr. Analog Design Engineer for our R&D team. In this role, you will focus on IC development for our SerDes (Serializer/Deserializer) products. You will have the opportunity to work with the most advanced CMOS technology on various analog and mixed-signal circuit blocks. The ideal candidate should have a deep understanding of analog/mixed-signal IC design and be able to work independently.
Base salary range is $138,000 to $218,000 a year. The base salary offer will depend on factors such as education, experience, training, skills, qualifications, and location. This position is also eligible for a discretionary bonus, equity and a full range of medical and other benefits.
Qualifications
Basic Qualifications
M.S. or Ph.D. in Electrical Engineering with emphasis on CMOS analog/mixed-signal IC design.
Five or more years of experience in IC development with advanced CMOS technology; familiarity with FinFET process.
Strong knowledge of analog/mixed-signal circuits such as op-amps, bandgap, regulators, comparators, equalization circuits, PLL/DLL, and phase interpolators.
Proficiency with EDA tools including Cadence Virtuoso, Synopsys Custom Compiler, MATLAB, and Verilog.
Hands-on experience from block definition through design, simulation, layout, and verification.
Preferred Qualifications
Experience with SerDes system design.
Mandarin proficiency strongly preferred.
Job responsibilities
Design analog and mixed-signal blocks for SerDes technology.
Use CAD tools to run circuit simulations and analyze results.
Work with layout engineers on physical layout and perform post-layout simulations.