Ph.D. in Electrical Engineering, Applied Physics, Photonics, or related field with 5+ years of industry experience.
7+ years of hands-on experience in silicon photonic integrated circuit (PIC) design.
Proven track record of successful silicon validation and characterization through full foundry tapeouts.
Deep expertise in photonic device physics and design-for-manufacturability (DFM) principles.
Proficiency with industry-standard simulation and layout tools like Ansys Lumerical and COMSOL.
Experience with optical characterization techniques and data analysis in Python or MATLAB.
Strong technical leadership and collaboration skills across multidisciplinary teams.
Responsibilities
Lead system-level architecture and design of large-scale silicon photonic integrated circuits (PICs).
Define chip-level optical architectures and performance trade-offs.
Drive top-level chip integration, floorplanning, and design-for-manufacturability strategies.
Contribute to photonic component library development.
Manage design verification and foundry tapeout execution as top-level tapeout owner.
Provide technical leadership and collaborate with component designers and engineers.
Guide wafer- and chip-level characterization strategies for PIC performance evaluation.
Benefits
Catered lunch provided daily at HQ.
Flexible work hours to accommodate global customer interactions.
High-trust, high-accountability work environment.
Opportunity to work in a hands-on, innovative lab setting.
Diverse team culture that encourages sharing food, culture, and ideas.
Full Job Description
Principal PIC (Photonic Integrated Circuit) Design Engineer
As a Principal PIC Design Engineer, you9ll take ownership of large scale photonic chip development from concept and simulation to layout, tapeout, and characterization. You9ll have the opportunity to architect complex photonic integrated systems, define chip-level specifications and trade-offs, and work closely with a multidisciplinary team in a fast-paced startup environment.
The Role:
Lead system-level architecture and design of large-scale silicon photonic integrated circuits (PICs), integrating hundreds to thousands of active and passive photonic devices.
Define chip-level optical architectures, link budgets, and performance trade-offs across insertion loss, crosstalk, bandwidth, power consumption, and thermal management.
Drive top-level chip integration, floorplanning, optical routing, and design-for-manufacturability (DFM) strategies for high-yield silicon photonics tapeouts.
Contribute to photonic component library development
Serve as top-level tapeout owner, managing design verification (DRC/LVS) and foundry tapeout execution
Provide technical leadership across multidisciplinary teams, collaborating closely with component designers, packaging engineers, electronic IC (EIC) designers, and system software engineers.
Guide wafer- and chip-level characterization strategies to evaluate full PIC performance against system-level requirements and drive iterative design updates.
Establish and maintain technical relationships with foundry partners to evaluate next-generation process design kits (PDKs) and platform capabilities.
What We9re Looking For
Ph.D. in Electrical Engineering, Applied Physics, Photonics, or a related field with 5+ years of relevant industry experience.
7+ years of hands-on experience in silicon photonic integrated circuit (PIC) design, including electromagnetic simulation, active and passive component optimization, and top-level chip layout/floorplanning.
Proven track record of taking complex silicon photonics designs through full foundry tapeouts (DRC/LVS) and successful silicon validation/characterization.
Deep expertise in photonic device physics, optical waveguide theory, silicon and silicon nitride fabrication processes, and design-for-manufacturability (DFM) principles.
Proficiency with industry-standard simulation and layout tools (e.g., Ansys Lumerical, Tidy3D, COMSOL, KLayout, and gdsfactory).
Experience with optical characterization techniques, data analysis in Python or MATLAB, and translating lab measurements into PDK and circuit design updates.
Strong technical leadership capability, excellent communication skills, and a demonstrated ability to collaborate across multidisciplinary teams (packaging, EIC, systems, and test).
Hands-on experience with silicon nitride (SiN) integration, multi-layer photonic routing architectures, or heterogeneous integration (e.g., III-V on silicon, thin-film lithium niobate).
Deep domain expertise in wideband photonic device performance spanning both C-band and O-band telecom/datacom wavelengths.
Strong scripting and automation capabilities in Python or MATLAB for component layout generation, automated simulation sweeps, and high-volume data analysis.
Experience with automated wafer-level testing setups, process variation extraction, and statistical yield modeling for PIC commercialization.
Life at Voyant
We build frontier hardware from our lab and office in Midtown Manhattan, where optical tables, lab benches and electronics sit alongside traditional office space. Our work is hands-on and primarily in person, but we don9t run on a rigid 9-to-5. We partner with customers across time zones, so some calls start early or run late, and we adjust schedules around them. We run a high-trust, high-accountability environment: you9ll own meaningful work, move quickly and often wear more than one hat. Voyant provides catered lunch every day at HQ, and we9re a diverse group of food lovers from around the world who enjoy sharing food, culture and technical ideas around the lunch table.
