Principal CPU Microarchitect - RISC-V & AI Compute

Tenstorrent$130K — $180K *
Enterprise Technology
8 - 10 years of experience
Job Overview by Ladders

Qualifications

  • 10+ years of experience in CPU performance modeling and microarchitecture design
  • In-depth knowledge of AI workload computational and memory bottlenecks, especially for Large Language Models
  • Experience in designing custom instruction set extensions and measuring their performance against real-world applications
  • Familiarity with open-source RISC-V cores
  • Experience with AI-based agentic workflows

Responsibilities

  • Analyze AI workloads to identify performance bottlenecks and CPU requirements
  • Lead the design of high-performance RISC-V CPU microarchitecture
  • Create and implement custom instructions for enhanced performance
  • Collaborate with compiler, software, and hardware teams for architecture co-design

Benefits

  • Hybrid work model with flexibility for remote or in-office work
  • Opportunity to influence cutting-edge CPU architecture at the forefront of AI
  • Exposure to advanced AI workloads and their impact on processor design
  • Collaboration with cross-functional teams enhancing professional growth
  • Competitive benefits package
Full Job Description
Our Tensix Team is building the future of AI compute with a ground-up architecture centered on scalable RISC-V processors. As we push performance boundaries, we're reimagining the frontend of our RISC-V cores to deliver major gains in programmability, efficiency, and developer experience. This is a rare opportunity to shape the CPU architecture at the heart of our AI platform and lead one of the most strategic technical efforts at Tenstorrent.

This role is hybrid, based out of Toronto, ON, Austin, TX or Santa Clara, CA.

We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are
  • Experienced Microarchitect: 10+ years of deep expertise in CPU performance modeling and microarchitecture design.
  • AI Workload Expert: Deeply familiar with the computational and memory bottlenecks of modern AI workloads, particularly Large Language Models (LLMs).
  • Hardware-Software Co-Designer: Driven to architect custom instruction set extensions and validate their performance gains against real-world workloads.
  • Ways to stand-out: Familiarity with open-source RISC-V cores, AI-based agentic workflow experience


What We Need
  • Profile & Analyze: Dissect cutting-edge AI workloads to identify execution bottlenecks and translate those insights into definitive CPU performance requirements.
  • Architect High-Performance Cores: Drive the microarchitecture of custom RISC-V CPU cores, balancing aggressive Performance, Power, and Area (PPA) targets.
  • Innovate the ISA: Design and implement custom instructions that unlock massive performance gains without sacrificing compiler programmability or developer velocity.
  • Cross-Functional Collaboration: Partner tightly across compiler, software, and hardware teams to co-design Tenstorrent's next-generation AI compute architecture.


What You Will Learn
  • How modern AI models stress CPU architecture and influence design decisions.
  • The interplay between compiler design, CPU microarchitecture, and real-world performance.
  • How Tenstorrent's unified hardware-software stack enables breakthrough performance for general-purpose AI compute.


Tenstorrent offers a highly competitive compensation package and benefits.

About Tenstorrent

Tenstorrent is a semiconductor company that designs and develops computer processors for artificial intelligence and machine learning applications. The company's processors are designed to be energy-efficient and scalable, and are used by a range of businesses, from small startups to large enterprises. Tenstorrent was founded in 2016 and is headquartered in Toronto, Ontario.
Learn more about Tenstorrent
Size
51 employees
Industry
Founded
2016

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