Principal Analog Design Engineer

Principal Analog Design Engineer Plano, Texas, United States Your new responsibilities • Responsible for design leadership and development of ultra-high performance, low noise analog solutions associated with mixed signal IC's from initial concept, until production ramp, including design for: manufacturability, yield, test, and reliability. • Performs and supervises detailed design, simulation, verification and validation of integrated circuits. • Directs and supervises block level and top-level layout actives to insure optimum circuit performance. • Expert level knowledge and experience designing for system / application level concerns, including: packaging, parasitics, power, die size, cost, etc. • "Power User" level knowledge of SPICE/Spectre testbench creation and simulations, including: PVT, Monte Carlo, mixed signal, modelling, optimization, etc. • Provides positive internal team leadership and communication, coordination of design requirements and tradeoffs, preparation for weekly meetings (internal and customer). • Analog design subject matter expert level communication with customer (and/or marketing), including: presentation in design reviews, representing the analog design team on weekly conference calls, defining / tracking / working to insure schedule adherence, interactive problem solving and customer communication under pressure, etc. • Highly creative problem solver, able to generate innovative, new next generation IP and file patents. • Generation of detailed relevant documentation including: architectural/concept reviews, design gate reviews, internal design documents, test requirements, etc. • Calm professional demeanor and excellent listening skills. • Ability to mentor. Who we are looking for • Master's degree in Electrical Engineering with 15 years of experience or PhD with 12 years' experience - with an emphasis in analog / mixed signal Integrated Circuit Design. page 1/2 • Experience with technical leadership in mixed signal IC Design, block level specifications, simulation, modelling, optimizing layout for performance, etc. • "Expert level" transistor level design knowledge and experience of standard analog building blocks including Bandgap references, current references, OPAMP, LDO, charge pumps and such for ultra-low noise performance in CMOS processes. Design experience in ADC is a plus • Excellent communication skills (both oral and written) are required, as customer level technical interface and design / team leadership is necessary under pressure situations. • Experience with relevant CAD tools (including Cadence Virtuoso, SPICE, etc.) • Excellent team player - as the role requires internal team leadership Please contact Joanely Ivette Mortimer for further information via Information at a Glance