Job Title: Design Engineer
Job Description: Responsible for the Design Rule Check, Layout vs. Schematic checking, and fixing all PDV/EMIR/Noise/SigEM violations and errors. Perform customization and implementation of top clocks and timing ECOs on high performance blocks. Specific duties of the position include the following: Specific job duties include: DRC/LVS/ERC/ANTENNA analysis and clean up; Floorplan analysis and congestion solution; Power IR/EM analysis and fix; Signal Em/Noise analysis and fix; Physical verification sign off; Implementing ECOs for timing closure; Customizing Clock tree structure; and Performing floor plan, place, and route.
Requirements: Master's degree or foreign equivalent in Electrical Engineering, Computer Engineering, or a related field of study.
Work experience must have included: Knowledge of hardware design including VLSI design, digital integrated circuits, logic design, design for testing, computer architecture, and digital design automation; knowledge of major EDA tools/design flows including Cadence Innovus; Cadence Virtuoso; Tempus; Design Compiler(DC); Experience in RTL coding, digital design and testing, physical implementation; Experience in Perl/TCL language programming; Experience in N16 and below technology, Chip level integration, and wire editing, Low-power implementation methodology; Experience with Netlist-GDS P&R, signoff task; and Experience in block level implementation or chip integration and signoff.
Work site: TSMC Technology, Inc., 2851 Junction Avenue, San Jose, CA 95134 and various unanticipated work locations
Salary Range: $155,896 to $158,000 per year
Pay Transparency / Benefits statement
At TSMC, your base pay is only part of your overall total compensation package. At the time of this posting, this role pays a salary range of $155,896 to $158,000/year. The range displayed reflects the minimum target for new hires. Actual pay may be more than the posted wage. Factors that influence pay include the individual's skills, qualifications, education, experience and the position level and location. TSMC's total compensation package consists of market competitive pay, allowances, bonuses, and comprehensive benefits. We also offer extensive development opportunities and programs.
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Date: Oct 28, 2026
Country/Region: US
City: San Jose
Company: TSMC Technology, Inc.
