ASIC/RTL Application Developer

Qualifications

• 5-7 years of experience in ASIC architecture and design
• Proficiency in RTL development and chip-level integration
• Strong background in verification methodologies and tools
• Experience in FPGA prototyping and algorithm analysis
• Solid understanding of the RTL-to-GDS flow and timing closure processes

Responsibilities

• Develop efficient architectures for ASIC systems
• Drive top-level architecture definition and RTL development
• Create and execute verification plans for chip integration
• Supervise RTL-to-GDS flow, synthesis, and timing closure processes
• Support development of test programs and chip validation
• Collaborate with FPGA engineers on early prototyping efforts
• Assist with algorithm verification and optimization

Benefits

• Opportunity to work on cutting-edge ASIC designs
• Collaborative and innovative work environment
• Professional growth and development opportunities
• Hands-on experience with industry-leading technologies
• Supportive team culture with emphasis on communication