SiFive

Workload / Performance Model Lead

SiFive$231K — $282K *
Enterprise Technology
8 - 10 years of experience
Job Overview by Ladders

Qualifications

  • MS or PhD in Computer Science / Computer Architecture
  • 10+ years experience in performance simulation tools including ISA and SoC
  • 5+ years in engineering team delivering HW or SW products
  • Strong foundation in high-performance out-of-order CPU architectures
  • Competency in workload characterization and reduction techniques
  • Strong OOP skills and experience with large code bases
  • Strong Discrete Event Simulation competency

Responsibilities

  • Identify and analyze CPU and accelerator performance
  • Develop innovative workload characterization methods
  • Create performance projection methodologies for complex workloads
  • Deploy performance evaluation tools and infrastructure
  • Analyze micro-architecture and software stack bottlenecks

Benefits

  • Comprehensive healthcare and retirement plans
  • Paid time off
  • Eligibility for variable compensation and equity options
  • Supportive work environment fostering innovation
  • Opportunity to work on cutting-edge projects
Full Job Description

Job Description:

The Role:

SiFive, a leader in RISC-V CPU IPs, is looking for an experienced leader to lead benchmarking and performance infrastructure development.   The candidate will be responsible for guiding the performance team to develop benchmarks for evaluating CPU / accelerator performance.  The candidate will also be responsible for guiding the team to develop and deploy performance tools needed for architecture development / evaluation.
 

Responsibilities:

  • Identify, prepare (develop or port and setup), analyze performance for processor / accelerator development.

  • Analyze performance bottlenecks in micro-architecture and software stack.

  • Develop innovative methods to characterize workloads on simulators, emulators and/or hardware platforms.

  • Develop performance projection methodology for complex workloads 

  • Develop and deploy efficient tools and infrastructure for performance evaluation

Requirements:

  • MS or PhD in Computer Science / Computer Architecture

  • 10+ years direct industry experience in performance simulation tools - from ISA to SoC / system simulators; from analytical to cycle-based models; from bare-metal environment to virtual machines. 

  • 5+ years involved in the engineering team to deliver HW or SW products.

  • Strong foundation in computer architecture of high performance out-of-order CPU designs.  Awareness of known industry micro-architectures is a plus.

  • Strong foundation in workload characterization to identify HW/SW performance bottlenecks

  • Strong foundation in workload reduction techniques for efficient performance simulation and projection

  • Competency in software engineering best practices needed to maintain and refactor very large object oriented code bases.

  • Strong object-oriented programming (OOP) skills, including encapsulation, class coherency, inheritance and polymorphism

  • Strong Discrete Event Simulation (DES) competency, particularly with regard to DES modeling techniques and best practices

  • Ability to independently analyze performance bottlenecks in micro-architecture and software stack.  Awareness of potential security holes is a plus.

  • Desirable: Hands-on expertise with either HW development (RTL/implementation flows, verification/validation, backend flows, FPGA flows) or SW development (C/assembly, OS/RTOS, IDEs, Compiler/Debuggers). 

  • Desirable: FPGA debug, including the use of Integrated Logic Analyzer for waveform capture and debug

  • Desirable: Familiar with git and branching/forking methodologies

If you want to do incredible work and be challenged by exciting, truly innovative projects that will test the boundaries of your skills and creativity, then SiFive is the place for you! Be proud of your work. Do things better. Join SiFive.

Pay & Benefits

Consistent with SiFive values and applicable law, we provide the following information to promote pay transparency and equity. We have a market-based pay structure which varies by location.  Please note that the base pay range is a guideline, and our compensation range reflects the cost of labor in the U.S. geographic market based on the location of the role. Pay within these ranges varies and depends on job-related knowledge, skills, and relevant work experience. 

For candidates who receive and offer, the starting salary will vary based on various factors including, but not limited to, such qualifications as, skill level, competencies, and work location.  The range provided may represent a candidate range and may not reflect the full range for an individual tenured employee.

Base Pay Range

$231,444.00-$282,876.00

In addition to base pay, this role may be eligible for variable/ incentive compensation and/ or equity.  In addition, this role is eligible for a comprehensive, competitive benefits package which may include healthcare and retirement plans, paid time off, and more! 

Additional Information:

This position requires a successful background and reference checks and satisfactory proof of your right to work in

United States of America

Any offer of employment for this position is also contingent on the Company verifying that you are a authorized for access to export-controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any necessary export license(s) or other approvals.

About SiFive

SiFive is a semiconductor company that designs and develops custom chips based on the RISC-V instruction set architecture. The company was founded in 2015 by a team of experts in computer architecture and chip design and is headquartered in San Mateo, California. SiFive's mission is to democratize access to custom silicon and enable innovation for all. The company has raised over $190 million in funding to date and has partnerships with several leading technology companies.
Learn more about SiFive
Size
300 employees
Industry
Founded
2015

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