Bachelor's in Electrical Engineering or Computer Engineering with 8-10 years of experience, or a Master's with at least 8 years of related experience.
Proven expertise in developing and executing platform-level electrical and functional test plans.
Experience in electrical characterization of processor I/O interfaces is preferred.
Strong debugging skills for processor and PC platform I/O interfaces.
Familiarity with oscilloscopes, schematics, layout documentation, and MS Windows/Office applications.
Excellent written and verbal communication skills, capable of engaging with diverse engineering teams.
Experience with SerDes and Optical link validation is highly preferred.
Responsibilities
Develop and execute comprehensive electrical and functional test plans for processor interface validation.
Perform electrical and functional validation for client processors using various validation tools.
Debug electrical and functional issues related to new processors.
Contribute to platform definition and review designs for silicon validation.
Provide technical guidance and training to junior engineers and technicians in testing and debugging processes.
Benefits
Opportunity to work in a highly technical team environment.
Engagement in cutting-edge processor silicon interface features.
Professional development through training and mentorship opportunities.
Exposure to advanced validation tools and methodologies.
Full Job Description
JOB DUTIES: In this role, this engineer will be part of a highly technical team that develops test plans, completes functional & electrical validation, & debugs issues for new processor silicon interface features with strong focus on power management. Writes comprehensive electrical & functional test plans for the processor interface validation of processors. Executes electrical & functional test plans for client processors using hardware & software validation tools, oscilloscopes, & logic analyzers. Debug of electrical & functional issues for new processors. Provides detailed input into the platform definition & review of platform designs used in the silicon validation of new processors. Provides technical guidance and training to less experienced engineers and technicians in the planning, test, & debug processor validation.
EXPERIENCE AND EDUCATION: Bachelors in Electrical Engineering or Computer Engineering with 8-10 years of related experience;or Masters plus at least 8+ years directly related experience (an advanced degree will be considered a plus);Requires experience and demonstrated technical expertise in the development & execution of platform level electrical & functional test plans; Platform level electrical characterization experience with processor I/O interfaces is considered, preferred; Requires experience and demonstrated technical expertise in the debug of processor & PC platform I/O interfaces. Demonstrated experience with or knowledge using oscilloscopes, reading schematics and layout documentation, and MS Windows and Office applications; Requires good written and oral communication skills; Demonstrate the ability to communicate with a variety of engineering disciplines and management.
SerDes and Optical link validation (Optical link system level validation) are highly preferred
