Extensive experience with CAD tools like Cadence Virtuoso and Spectre.
Proven track record in designing complex analog/mixed-signal IPs in deep submicron CMOS.
Experience in bringing high-performance analog IPs, such as ADCs and DACs, to production.
Strong understanding of CMOS analog/mixed-signal design methodologies.
Knowledge of device physics and layout effects.
Proficient in behavioral modeling using Verilog-A or Verilog-AMS.
Ability to collaborate effectively in a fast-paced environment.
Responsibilities
Design and simulate high-speed analog circuits, including ADCs and DACs.
Create and optimize layout floor plans, supervising layout engineers as needed.
Evaluate trade-offs of different circuit topologies to meet performance requirements.
Develop analog testing plans and collaborate with PE/TE teams for product characterization.
Support and adhere to team design methodologies and release processes.
Benefits
Corporate Retirement Savings Plan
Health and dental benefits
Short-term and long-term disability coverage
Life insurance and AD&D coverage at 2x base pay
Optional life and AD&D insurance for family members
Paid time off for holidays and vacation
Employee Stock Purchase Plan
Tuition Assistance Plan
Adoption assistance
Employee Assistance Program/Work Life Resource Program
Full Job Description
Job Description
The successful candidate shall possess the capability to design and analyze high-speed, high-performance analog/mixed-signal circuits, including data converters, PLLs, and SERDES, in advanced CMOS FinFET technologies. She or he shall bring the design to production. Engaging in high-speed analog circuit design gives you the chance to create the technical differentiation that will allow Infinera to hold market leadership. By building cutting-edge circuitry, we will together revolutionize the era of efficient high-speed transmission.
Responsibilities
Design, implement, and simulate the functionality and performance of various high speed analog circuits, including the ADCs and DACs;
Create the layout floor plans to optimize the overall performance; Supervise the layout activities and give concise guidelines to layout engineers, need to be hands on in drawing layout if necessary;
Exploring the trade-offs of the different topologies and propose the best solution to achieve or exceed the requirements in terms of power/area/linearity/bandwidth, etc.
Develop the analog testing plans and work with the PE/TE teams to characterize the functionality and performance of the products to ensure the quality;
Need to support and comply with the team's design methodologies and release flows.
Qualifications
Mandatory Knowledge/Skills/Abilities:
Must be extremely familiar with essential CAD tools, such as Cadence Virtuoso, Spectre, Incisive, Calibre, EMX, and Totem EM/IR, etc.
Must have a proven tracking record of designing complex analog / mixed signal IPs or chips in deep submicron CMOS technologies.
Must have experiences in bringing high performance analog IPs including but not limited to high-speed ADC, high-speed DAC, and high-frequency low-jitter PLL to production.
Must have a decent understanding in CMOS analog / mixed signal design methodologies and circuit analysis;
Must have a good understanding of device physics and the impacts of layout effects;
Able to perform the behavioral modeling the blocks and circuits with Verilog-A or Verilog-AMS;
Collaborative with other local or remote team members in a fast-paced professional environment.
Preferred Knowledge/Skill/Abilities:
Fluent in verbal and written communications;
Independently resolves issues and conquer design challenges;
Self-motivated and detail-oriented;
Has the knowledge of (optical) communication theories and Matlab coding.
Education and Experience Requirements:
Principal Design Engineer: M.S. in E.E. with 12+ years' experience, or Ph.D. in E.E. with 8+ years' experience
About the Team
Some of our benefits in US:
Corporate Retirement Savings Plan
Health and dental benefits
Short-term disability, and long-term disability
Life insurance, and AD&D - Company paid 2x base pay
Optional or Supplemental life and AD&D insurance (Employee/Spouse/Child)
Paid time off for holidays and Vacation
Employee Stock Purchase Plan
Tuition Assistance Plan
Adoption assistance
Employee Assistance Program/Work Life Resource Program
The above benefits exclude students.
Disclaimer for US/Canada
Nokia Maintains broad annual base salary ranges for its roles in order to account for variations in knowledge, skills, experience and market conditions, and with consideration to internal peer equity. Check the salary ranges in the job info section for this role.
All North America job posts will post for a minimum of 7 calendar days and up to 180 days or until candidate/s identified.
About Nokia
Nokia is a Finnish multinational telecommunications, information technology, and consumer electronics company. The company was founded in 1865 and has since grown to become one of the largest telecommunications equipment manufacturers in the world. Nokia's products include mobile phones, smartphones, and network equipment, among others. The company is committed to innovation and has a strong focus on research and development. Nokia is also committed to sustainability and has set ambitious targets for reducing its environmental impact. The company operates in over 100 countries and has a strong presence in Europe, Asia, and North America.
