Full Job Description
We are seeking a highly motivated Staff Engineer, Advanced Packaging & Package Integration to lead package technology development, architecture, NPI, and manufacturing execution for next-generation AI and data center products. The role will focus on advanced heterogeneous integration and close collaboration with foundries, OSATs, substrate suppliers, and internal design and manufacturing teams.
Key Responsibilities
Advanced Package Development & Integration
• Lead package development for 2.5D/3D integration, CoWoS, SoIC, HBM, Silicon Bridge, hybrid bonding, FCBGA, and high-density substrates.
• Drive package architecture optimization, including die floorplanning, bump/microbump strategy, power/signal integrity, and thermal/mechanical design.
• Develop package test vehicles to support technology qualification and early risk reduction.
NPI & Manufacturing
• Lead package NPI from concept through engineering builds, qualification, production ramp, and manufacturing release.
• Drive bumping, flip-chip assembly, underfill, thermal solutions, substrate assembly, and board-level integration.
• Lead technical risk assessment, root-cause analysis, qualification, yield improvement, and manufacturing readiness.
Foundry & Supplier Collaboration
• Partner with foundries, bumping houses, substrate suppliers, and OSATs on design rules, PDK readiness, process capability, reliability, yield, cycle time, capacity, and production ramp.
• Support new process and production-line qualification and multi-source readiness.
Additional Skills
• Good analytical and project management skills.
• Excellent capability of innovation and creativity.
• Highly motivated and committed to success of the individual and the team.
• Superior interpersonal communication skills. Publish technical reports.
• Able to work flexible hours. Occasional domestic/international travels needed.
Minimum Qualifications:
• Bachelor's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 4+ years of System/Package Design/Technology Engineering or related work experience.
OR
Master's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 3+ years of System/Package Design/Technology Engineering or related work experience.
OR
PhD in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 2+ year of System/Package Design/Technology Engineering or related work experience.
Preferred Qualifications:
• M.S. or Ph.D. in Materials Science, Mechanical engineering, chemical engineering or equivalent.
• Minimum of 8-10 years hands-on experience in silicon interconnect process, bumping and/or RDL process, new technology qualification and production.
Pay range and Other Compensation & Benefits:
$160,200.00 - $240,200.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
