Experience with NAND flash commands and operations.
Background in developing NAND management algorithms or error control coding.
Proficient in C or C++ programming languages.
Hands-on experience designing firmware for SSD/NAND controllers or at kernel level.
Experience with debugging tools like JTAG and In-Circuit Emulator.
Strong skills in code and design reviews.
Ability to produce high-quality product output.
Responsibilities
Design and implement firmware for the Flash Interface Layer of SSD.
Integrate developed code with other modules and troubleshoot issues.
Debug and address bugs in FPGA/ASIC environments.
Contribute proactively in teamwork settings.
Engage with cross-functional teams including SoC, hardware, and validation.
Benefits
Gain hands-on experience in a cutting-edge tech environment.
Work closely with cross-functional teams to enhance collaboration skills.
Opportunity to enhance technical skills in firmware and embedded systems.
Develop problem-solving skills in a practical environment.
Full Job Description
Internship Duration: 6 months
Hours: 40 hours per week
Start Date: Immediately (September/October 2026)
Location: San Jose
Qualifications:
Experience or good knowledge over NAND flash commands and operations.
Experience in developing NAND managing algorithms or error control coding.
Proficient in C or C++ programming.
Hands-on experience in design and implement firmware for SSD/NAND controllers or Flash firmware at kernel level.
Hands-on experience in debugging tools such as JTAG, In-Circuit Emulator, etc.
Excellent code and design review skills.
Ability to generate product level quality output.
Experience in software design and programming in embedded controller environment.
Strong BSP (Board Support Package) background with hands-on experience in device drivers. This includes reading datasheets, design device driver and implementing firmware in real-time system.
Ability to work creatively and analytically in a problem- solving environment.
Good oral and written skills for communication and documentation.
Good understanding of ARM architecture and experience in ARM assembly is a plus.
Good understanding in Linux kernel, device drivers and storage S/W stack is a plus.
Roles & Responsibilities:
Design & implement firmware code for Flash Interface Layer of SSD.
Integrate developed code with other modules and resolve issues.
Debug and solve the bugs on FPGA/ASIC environment.
Proactively contribute in teamwork.
Proactively engage with other teams including SoC, hardware, validation teams with good communication skills.
Education Requirements
Currently pursuing or recently completed a Bachelor of Science or Master of Science degree in Electrical Engineering, Computer Science, or related field.
