B.S. in Electrical Engineering, Optical Engineering, Physics, or related field; M.S. or PhD preferred
2+ years in silicon photonics or integrated photonic device design
Strong grasp of photonic device physics including waveguides and micro-ring resonators
Proficient with simulation tools for passive optical devices
Python programming skills for structured code development
Ability to connect simulation results with measurement data
Responsibilities
Design integrated photonic components for optical I/O products
Plan and execute tests to refine simulation models
Contribute to the design and analysis codebase for team efficiency
Collaborate with cross-functional teams to define device specifications
Assess design margins using foundry process data for manufacturability
Benefits
Opportunity to work on cutting-edge photonics technology
Fast-paced environment with direct impact on product development
Collaborative team culture with cross-disciplinary engagement
Potential for rapid professional growth and skill development
Involvement in real tape-outs and product launches
Full Job Description
Sr. Engineer, Photonics Device Design
Location: San Jose (on-site)
As a photonics design engineer at Ayar Labs, you'll work on the devices at the heart of our CPO solution - designing, simulating, and characterizing integrated photonic components for an aggressive optical I/O product roadmap. You'll contribute to real tape-outs, develop compact models from measurement data, and build tools and infrastructure the team depends on. Because our team is small and the problems are real, you'll develop faster here than almost anywhere else: your contributions land in product, not in a backlog.
Essential Functions
Design. Design integrated photonic components needed for an aggressive optical I/O product roadmap - passive devices (couplers, gratings, micro-ring resonators) and the system context that sets their requirements.
Characterize and iterate. Plan test vehicles, use measurement data to refine simulation models, and drive device performance toward roadmap targets.
Build infrastructure. Contribute to the team's design and analysis codebase - extend simulation automation, layout scripts, and data analysis tools that make the whole team faster.
Collaborate. Work with colleagues across packaging, laser, circuits, and firmware to understand system requirements and translate them into device specifications.
Support manufacturability. Work with foundry process data to assess design margins, contribute to design-for-manufacturability, and support yield improvement on new device designs.
Required Qualifications
B.S. or equivalent experience in Electrical Engineering, Optical Engineering, Physics, or related field; M.S. or PhD a plus
2+ years of experience in silicon photonics or integrated photonic device design (research or commercial)
Experience with simulation tools for passive optical devices (e.g., FDTD, mode solvers)
Python skills; experience writing structured code in a team environment
Ability to connect simulation to measurement - design, characterize, and iterate on device performance
Preferred Qualifications
M.S. or PhD with integrated photonics focus
Experience contributing to PIC tape-outs on a standard silicon photonics platform (e.g., AIM Photonics, GlobalFoundries, imec, or similar)
Experience designing or characterizing electro-optic devices: micro-ring modulators, photodetectors
High-speed test experience: BERT, VNA, wafer-level characterization
Statistical analysis of device or process data; DOE methods
Familiarity with optical transceiver principles and co-packaged optics architectures
Demonstrated use of AI tools to achieve meaningful productivity gains in design or analysis workflows - e.g., device optimization, AI-assisted code development
Salary range: $170,000-$220,000
NOTE TO RECRUITERS: Principals only. We are not accepting resumes from recruiters for this position. Remuneration for recruiting activities is only applicable subject to a signed and executed agreement between the parties. Please don't send candidates to Ayar Labs, and do not contact our managers.
