Full Job Description
THE ROLE:
AMD is looking for AI Networking Systems Software Engineer to drive the design, development and bring-up of networking software for GPU scale-up interconnects and Ethernet-based AI fabrics. You will be a senior technical contributor in a core team of industry specialists, working with the latest GPU, NIC, switch and rack-scale technology.
In this role, you will lead the design, development, optimization and bring-up of networking software across the driver, firmware and systems software layers for AMD Helios rack-scale deployments, with a primary focus on Ethernet-based scale-up GPU interconnect and scale-out networking. You will work across silicon, hardware, firmware, driver, switch software and architecture teams to deliver high-performance, low-latency and resilient networking for next-generation AI infrastructure.
THE PERSON:
The ideal candidate is a senior software engineer with deep experience across networking, switches and GPU interconnects, who can own complex technical areas end to end and drive difficult cross-team issues to resolution. You communicate clearly with architecture, hardware, firmware and software teams, and provide technical direction and mentorship to other engineers.
You have hands-on experience spanning device drivers, embedded firmware and systems software, and are comfortable debugging problems that cross silicon, firmware, driver, switch and workload boundaries. You work well in ambiguous, fast-moving environments and are motivated by end-to-end system challenges in rack-scale AI platforms.
KEY RESPONSIBILITIES:
• Lead the design and development of networking software for GPU scale-up interconnect and Ethernet-based AI fabrics on AMD Helios rack-scale systems
• Develop and optimize Linux kernel drivers, embedded firmware and user-space software for GPU interconnect, NIC and switch subsystems
• Drive hardware and software bring-up of new ASICs and platforms, including SerDes and link initialization, Ethernet MAC/PCS/FEC configuration, topology discovery and validation
• Work with switch software teams on switch configuration, forwarding, QoS, telemetry and fabric management for scale-up and scale-out topologies
• Define firmware, driver and management interfaces and control-plane protocols between GPUs, switches and fabric management software
• Analyze end-to-end network performance, latency, bandwidth utilization, congestion behavior and communication efficiency across multi-node and rack-scale deployments
• Develop tools, diagnostics and telemetry frameworks to monitor link and fabric health, identify bottlenecks and accelerate root cause analysis
• Investigate and resolve issues across the stack, including GPU interconnect, NICs, switches, transport layers, firmware, drivers, collective communication libraries and distributed runtimes
• Contribute to resiliency, RAS, serviceability and deployment readiness features for large-scale clusters
• Support performance characterization of collective operations and distributed training and inference workloads over scale-up and scale-out fabrics
• Partner with internal and external teams, including switch and platform vendors, to validate interoperability and optimize AI workload performance on AMD platforms
• Help define software requirements and influence future GPU, interconnect, switch and system architecture
• Provide technical leadership through design and code reviews, and mentor engineers across the team
PREFERRED EXPERIENCE:
• Years of experience in networking, systems software, driver or firmware development
• Strong C/C++ programming skills with a keen attention to code quality; Python or Go for tooling is a plus
• Linux kernel driver development experience, including PCIe devices, DMA, interrupts and memory management
• Embedded firmware development experience on microcontrollers or SoC management processors, including RTOS or bare-metal environments
• Strong knowledge of Ethernet (MAC, PCS, FEC, SerDes, link training and auto-negotiation) and high-speed link bring-up
• Experience with GPU interconnect or scale-up fabric technologies such as UALink, Infinity Fabric/xGMI, NVLink or Ethernet-based scale-up
• Strong Ethernet networking experience, including L2 switching and bridging, VLANs, MAC learning, LLDP, link aggregation, L3 forwarding, and QoS (PFC, ETS, ECN, buffer and queue management)
• Experience with datacenter switch software such as SONiC, SAI or switch ASIC SDKs
• Experience with network protocols and transports such as RDMA, RoCE, InfiniBand, TCP/IP or related high-performance transport technologies
• Familiarity with scale-up and scale-out architectures in AI or large distributed computing environments
• Experience debugging complex multi-node system issues involving hardware, firmware, drivers, switches and application workloads
• Experience with performance analysis, profiling, tracing and observability tools used for system and network performance tuning
• Experience with ASIC, GPU, NIC or switch bring-up is highly desirable
• Knowledge of reliability, availability and serviceability considerations in rack-scale or datacenter deployments is a plus
• Experience with software development processes and tools such as debuggers and source code control
• Effective communication and problem-solving skills, with a proven ability to lead technical work across architecture, hardware, firmware, software and validation teams
ACADEMIC CREDENTIALS:
• Bachelor's or Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent
LOCATION: Santa Clara, CA
This role is not eligible for visa sponsorship.
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