Tenstorrent is seeking a highly skilled and experienced Engineer to lead post-silicon power characterization and correlation activities for cutting-edge semiconductor products. In this role, you will be responsible for developing and executing detailed power measurement strategies on silicon, correlating results with pre-silicon models, and driving improvements across power architecture, design, and modeling methodologies. You will serve as a key technical leader, interfacing across design, architecture, validation, and systems teams to ensure silicon meets power and performance specifications under all operating conditions.
This role is hybrid, based out of Toronto, ON or Austin, TX or Santa Clara, CA.
We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.
Who you are- A Principal-level engineer with 8+ years in silicon power analysis and characterization, and a Master's or PhD in EE, CE, or related field.
- Deep understanding of digital and mixed-signal power domains, including DVFS, leakage vs. dynamic power, and power gating.
- Highly proficient in lab-based power measurement using oscilloscopes, current probes, power analyzers, and SMUs, plus Python/Perl/MATLAB for automation and analytics.
- A strong debugger and collaborator, comfortable driving cross-functional investigations and clearly communicating technical findings.
What we need- Own the post-silicon power measurement strategy end-to-end across operating modes, voltages, frequencies, and workloads.
- Build and maintain lab infrastructure, automated workflows, and data analysis pipelines for high-fidelity, repeatable power characterization.
- Correlate silicon power data to pre-silicon models (RTL, gate-level, sign-off), drive root-cause analysis, and refine power estimation methodologies with design and modeling teams.
- Characterize power across PVT corners and work with bring-up/validation teams to develop test content, debug power anomalies, and ensure products meet power and performance specs.
What you will learn- How state-of-the-art SoCs behave in real silicon across diverse workloads, system configurations, and operating conditions.
- How to influence power architecture, RTL design, and modeling flows by feeding silicon insights directly back into early design phases.
- Best practices for building scalable, automated post-silicon power infrastructures that support multiple products and generations.
- Advanced correlation, margining, and variability analysis techniques that deepen your expertise in both SoC-level power and system-level behavior.
Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.
