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X In most instances, this position requires in-person interviews as part of the hiring process
Minimum qualifications: - Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent practical experience.
- 5 years of software development experience in C or C with a focus on systems programming.
- Experience with low-level systems architecture: PCIe, DMA, IOMMU, memory-mapped I/O (MMIO), and interrupt handling.
- Experience debugging on pre-silicon or early bring-up platforms using hardware emulators (e.g., P3, CSS models) or physical logic analyzers/JTAG.
Preferred qualifications: - Master's degree or PhD in Engineering, Computer Science, or a related technical field.
- Experience with custom SoC storage virtualization technologies (e.g., NVMe/SCSI controller emulation, VirtIO).
- Familiarity with storage data protection protocols, including block cryptography and data integrity validation (logical block addressing (LBA) mapping, cryptographic hashes).
- Understanding of hardware-level security architectures.
About the jobWith your technical expertise you will manage project priorities, deadlines, and deliverables. You will design, develop, test, deploy, maintain, and enhance software solutions.
As a Senior Software Engineer for the IPU Storage Offloads team, you will design and implement the low-level software and firmware that powers Google's next-generation Infrastructure Processing Unit (IPU). You will focus on the Persistent Disk (PD) data path, enabling high-performance NVMe emulation, hardware compression/decompression, and hardware-accelerated cryptography.
You will bridge the gap between ASIC capabilities and core block-storage services to deliver unprecedented Input/Output Operations per Second (IOPS) and latency metrics while guaranteeing end-to-end data integrity and confidentiality.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
US: $174000 - $252000 (USD) 15% bonus target equity benefits
Learn more about benefits at Google .
Responsibilities - Develop low-level drivers and kernel-level modules.
- Develop embedded C services running natively on ARM CPU cores to manage storage queues, ring buffers, and Peripheral Component Interconnect Express (PCIe)/Direct Memory Access (DMA) controllers.
- Optimize the data-path for microsecond-level latency and millions of IOPS using advanced hardware features like physical doorbells and direct cache routing.
