Req ID: 137899
Region: Americas
Country: USA
State/Province: California
City: San Jose

General Overview

Functional Area: Engineering (ENG)
Career Stream: Engineering (ENG)
Role: Senior Principal (SPR)
Job Title: Senior Principal, Design Engineering
Job Code: SPR-ENG-DSGN

Summary

The Senior Principal, Design Engineering will be responsible for architecting, implementing, and supporting power system solutions for Networking, storage & server systems and related products. In this position you will help develop hardware solutions to be integrated into common platform designs including processors, high speed serial interfaces, NPUs, FPGAs, High speed memory (DDR4/DDR5) and high-speed PCB layout. You will work with design, software/firmware, mechanical and thermal engineers. You will drive system architecture of multi-tiered power network design from rack level power distribution down to the board level POL solution. The successful candidate will work across disciplines to assure power supply designs meet the power, thermal, and safety requirements of the system specification. You will work closely with Celestica multi-disciplinary engineering and manufacturing teams to understand the system requirements and contribute or lead the specification, design, and debug of complex power delivery systems for datacenter products.

Skills & Responsibilities:

• Engage with customers and key suppliers on leading power solution architecture and solutions for high power systems such as AI/ML.
• Act as recognized power SME and trusted advisor to customers and internal stakeholders
• Drive related power technology roadmap initiatives with ecosystems, early customer engagement, and internal investment activities
• Develop power solution concepts with critical insights into trade-offs, risks, and benefits
• Develop and validate power systems requirements between customers and engineering
• Oversight, guidance, and review power development activity within engineering to ensure alignment to requirements and assist in key risk management mitigations
• Experience with high power, low noise, efficient, high density board level power design, including relevant simulations, analysis , test vehicles, and test plans
• Experience with system power architecture, subsystem and rack level, power redundancy strategies.
• Support engineering technical leads, power engineers, and SI engineers on constraints, components selection, power tree design, test plans, bring-up and debug as needed.
• Participate in industry organizations and supplier engagements driving leading edge power solutions

Experience:

• 10+ years industry experience, 5+ years power supply design experience
• Familiar with the theory of buck, boost, buck-boost, LDO, hotswap, oring, load switch, E-fuse, fuel gauge, fuse transistor, diode cell and DC relevant parts and IC.
• Familiar with Intel VR solutions like VR12.5 and VR13 design.
• Well understand power efficiency optimization.
• Experience of products development from prototype to mass production.
• Proficiency in high efficiency DC-DC power conversion design, analysis, circuit simulation, control loops, and stabilization.
• Good understanding and skills to determine phase and gain margins
• Proficiency in power design component selection and trade-offs
• Proficiency with Spice, LTspice, TI WorkBench, etc. circuit simulators
• Experience in both high current low voltage multi-phase (>500W) as well as ultra-low noise power delivery circuitry
• Proficiency in power supply layout and thermal design rules
• Technical leadership of PCB layout with respect to various grounding and low noise etch techniques
• Proficiency in power-up sequencing in multi-power supply systems
• Designing interfaces with Processors, SPI & I2C devices
• Ability to quickly grasp the existing designs and able to work independently with minimal supervision
• Excellent verbal, written communication skills to produce Specifications and Test Plans
• Experience in power supply design for leading edge high speed communication devices
• Experience in power supply design for sensitive optical, switch, memory, NPU, CPU, GPU components
• Failure mode analysis
• Good understanding of power efficiency optimization schemes
• Experience with Cadence Allegro and DxDesigner tools

Typical Education

• Bachelor's degree in Electrical Engineering, Master's is preferred.
• Educational Requirements may vary by Geography.

Salary

$182,000- $319,000

The salary range described in this posting is an estimate by the Company, and may change based on several factors, including by not limited to a change in the duties covered by the job posting, or the credentials, experience or geographic jurisdiction of the successful candidate.

Notes

This job description is not intended to be an exhaustive list of all duties and responsibilities of the position. Employees are held accountable for all duties of the job. Job duties and the % of time identified for any function are subject to change at any time.

Celestica would like to thank all applicants, however, only qualified applicants will be contacted.
Celestica does not accept unsolicited resumes from recruitment agencies or fee based recruitment services.