MS or PhD in Electrical Engineering or related field
7+ years of hands-on analog or mixed-signal IC design experience
Strong fundamentals in feedback and stability analysis, noise and jitter modeling, and high-speed analog circuit design
Experience taking Driver, TIA, or related analog blocks through tape-out and lab validation
Proficiency with industry-standard analog design and simulation tools
Responsibilities
Architect and design high-speed analog and mixed-signal circuits including transmit drivers and TIAs
Perform transistor-level design, simulation, and optimization across PVT corners
Analyze and optimize bandwidth, noise, linearity, jitter, stability, and power
Collaborate with layout engineers on floorplanning, matching, isolation, and parasitic management
Define and support silicon bring-up, characterization, and debug, including correlation to simulations
Contribute to design methodology, IP reuse, and best practices
Benefits
Competitive salary and significant equity compensation
Comprehensive health, dental, and vision insurance
Flexible time off policy
Direct impact on technology shaping the future of AI and data centers
Collaboration with a highly experienced team
Dynamic and innovative work environment
Opportunities for rapid career growth
Full Job Description
Position Overview
We are seeking an experienced Analog / Mixed-Signal IC Design Engineer to design and deliver high-performance Driver and TIA circuits in BiCMOS and advanced semiconductor nodes. This role involves end-to-end ownership of analog building blocks, from architectural definition through silicon validation, in a fast-moving and technically rigorous environment. You will collaborate closely with digital, layout, and validation teams to deliver scalable, manufacturable analog IP.
Key Responsibilities
Architect and design high-speed analog and mixed-signal circuits, including:
Transmit drivers (linear and/or PAM-based)
Transimpedance amplifiers (TIAs) and receiver front-ends
Clocking and timing circuits (PLLs, DLLs, low-jitter references)
Biasing networks, bandgaps, and on-chip power regulation
Perform transistor-level design, simulation, and optimization across PVT corners.
Analyze and optimize bandwidth, noise, linearity, jitter, stability, and power.
Work closely with layout engineers on floorplanning, matching, isolation, and parasitic management.
Define and support silicon bring-up, characterization, and debug, including correlation to simulations.
Contribute to design methodology, IP reuse, and best practices across programs.
Required Qualifications:
MS or PhD in Electrical Engineering or related field.
7+ years of hands-on analog or mixed-signal IC design experience.
Strong fundamentals in:
Feedback and stability analysis
Noise and jitter modeling
High-speed analog circuit design
Power integrity and substrate isolation
Experience taking Driver, TIA, or related analog blocks through tape-out and lab validation.
Proficiency with industry-standard analog design and simulation tools.
Preferred Qualifications:
BiCMOS (SiGe) and/or advanced CMOS nodes.
High-speed data-path or I/O-adjacent analog circuits.
Experience with process scaling and technology trade-offs.
Exposure to silicon debug, failure analysis, and yield learning.
Why Join
Deep technical ownership with visible impact.
Opportunity to work in advanced semiconductor technologies.
Small, focused teams with high engineering standards.
Benefits:
Competitive salary and significant equity compensation in a rapidly growing, well-funded startup.
Comprehensive health, dental, and vision insurance.
Flexible time off policy.
Direct impact on groundbreaking technology shaping the future of AI and data centers.
Opportunity to work with a highly experienced and collaborative team.
