Job Details:Job Description:About the RoleWe are seeking an experienced semiconductor Package Reliability Engineer responsible for characterizing and qualifying advanced 2.5D/3D semiconductor packages. This role requires partnering with package development engineers and semiconductor package assembly and manufacturing teams for selection of packaging materials based on thermal and thermomechanical characterization for advanced packaging technologies.
Key Responsibilities- Partner with package development and assembly teams for packaging materials (substrate, and assembly materials) selection to meet product thermomechanical reliability requirements
- Develop and maintain advanced semiconductor package thermal and thermomechanical finite element models using commercial software (e.g., Ansys, Abaqus)
- Define, execute and interpret package coplanarity, warpage, and second level reliability data collection strategies to calibrate the thermal and thermomechanical FEM models
- Lead package reliability evaluations to validate package robustness as defined by industry standards such as JEDEC, MIL-STD, IPC, and AEC using test-chips and products
- Understand FPGA use conditions and develop customer reports, communications related to package thermal and thermomechanical concerns.
- Perform reliability lifetime prediction modeling from stress test/field data
- Develop and own package DFMEA/FMEA's partnering with development and manufacturing teams
Salary RangeThe pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.
$166,900 - $240,000 USDWe use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations.
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Qualifications:Minimum Qualifications- Master's degree in Mechanical Engineering, Materials Science, Packaging Engineering, or a related technical field with 8+ years of experience in semiconductor package thermal and thermomechanical analysis
- 8+ years of experience using thermal and thermomechanical simulation tools (e.g., Ansys, Abaqus, COMSOL, or equivalent) to develop and analyze warpage, coplanarity, stress, and deformation models for advanced semiconductor packages.
- 8+ years of experience developing, analyzing, and validating advanced semiconductor packaging technologies, including 2.5D, 3D, and heterogeneous integration packages, with a strong understanding of package reliability.
- 3+ years of experience applying reliability statistics, failure analysis methodologies, and lifetime modeling techniques to semiconductor packaging and product reliability assessments.
- 3+ years of experience developing scripts or software using Python for automation, simulation workflows, data analysis, and post-processing.
Preferred Qualifications- Deep understanding of thermal, mechanical and thermomechanical characteristics of advanced 2.5D/3D flip-chip packages
- Ability to correlate between thermomechanical simulations and package dynamic warpage and package behavior in surface mount system level assembly
- Develop customer facing collaterals for packaging risk assessments
Job Type: Regular
Shift:Shift 1 (United States of America)
Primary Location:San Jose, California, United States
Additional Locations: 
