Position Summary:As the Senior Manager for Power Electronics Software & Controls, you will serve as the technical anchor and organizational leader for the team building the digital intelligence behind our next-generation Battery Energy Storage Systems (BESS) and mixed-asset energy sites. We are looking for a deeply technical player-coach, someone who can go deep with our engineers on stability margins, modulation schemes, and multi-core cycle budgets, while driving multiple programs from ideation through volume production and field maintenance.
You will unify advanced control theory and bare-metal embedded firmware under a single architectural vision. From modeling high-order resonant tanks in PLECS to deploying deterministic, safety-critical Rust and C code onto ARM Cortex-R/M silicon, your team will ensure that heterogeneous, second-life, and new battery assets operate in seamless synchronization to stabilize the grid at industrial scale.
This position is based in our San Francisco office and operates on an onsite work model.
Essential Duties and Responsibilities - End-to-End Program Leadership: Own the software and controls technical roadmap and delivery across multiple concurrent power electronics program, driving systems from first-principles concept and topology selection through EVT/DVT/PVT, mass manufacturing, utility commissioning, and in-field fleet diagnostics/OTA maintenance.
- Advanced Control Systems & Topologies: Guide the theoretical design, discrete-time synthesis, and optimization of closed-loop controllers for bidirectional DC/DC and AC/DC stages, including resonant topologies (DAB, LLC, CLLC) and multi-level architectures (Flying Capacitor, ANPC).
- Grid-Scale & Multi-Asset Synchronization: Direct the development of advanced grid-forming (GFM) and grid-following (GFL) algorithms, virtual synchronous machine (VSM) dynamics, black-start capabilities, and active power/thermal balancing across heterogeneous, recycled, and new battery arrays.
- Bare-Metal & Multi-Core Firmware Architecture: Oversee the firmware architecture for real-time control targets (ARM Cortex-R, Cortex-M, and DSPs), enforcing deterministic execution, sub-microsecond interrupt latency, high-resolution PWM synchronization, DMA-driven ADC sampling, and zero-overhead hardware abstraction in Rust and C.
- Safety-Critical & Resilient Systems: Establish rigorous architectural standards for functional isolation, freedom from interference (FFI), memory protection, and fault-tolerant state machines across multi-core environments, ensuring compliance with UL 1741, UL 1973, and IEEE 1547.
- Hardware-Software Co-Design: Partner directly with power electronics hardware, magnetics, thermal, and site-controller leaders to optimize switching frequencies, dead-time compensation, thermal derating curves, and semiconductor loss balancing.
- Field Telemetry & Fleet Reliability: Build closed-loop feedback systems from deployed field assets back to R&D-leveraging high-resolution fault capture and time-series telemetry to root-cause elusive grid-interaction anomalies and deploy fleet-wide control refinements.
- Talent & Culture: Recruit, mentor, and retain an elite team of controls engineers and embedded firmware architects, fostering a culture of deep technical rigor, first-principles problem-solving, and high velocity.
Skills, Knowledge, and Abilities - Education & Experience: MS or PhD in Electrical Engineering, Computer Engineering, or a closely related field specializing in Power Electronics, Control Systems, or Embedded Systems, combined with 10+ years of industry experience shipping high-power conversion systems and 5+ years leading highly technical engineering teams.
- Topology & Control Theory Mastery: Deep theoretical and practical command of high-efficiency power conversion (DAB, LLC, CLLC, Flying Capacitor, ANPC) and classical/modern control theory (frequency-domain loop shaping, Bode/Nyquist stability analysis, state-space modeling, discrete-time z-domain implementation, and active damping).
- Real-Time Embedded Systems Fluency: Proven architectural mastery over bare-metal firmware in C and/or Rust on ARM Cortex-R/M or real-time DSP platforms-including multi-core memory architecture, lock-free concurrency, peripheral drivers (CAN/CAN-FD, SPI, Ethernet, UART), and cycle-accurate profiling/debugging (JTAG/SWD, logic analyzers, oscilloscopes).
- Simulation & Automated Validation: Expert-level fluency with power electronics modeling tools (PLECS, MATLAB/Simulink), Python for data analysis/test automation, and real-time HIL simulation platforms (Typhoon HIL, Opal-RT) integrated into modern CI/CD build systems (CMake, Git-based workflows).
- Production Track Record: Demonstrated history of taking complex, high-power hardware/software systems from initial mathematical modeling and bring-up through regulatory certification (UL 1741, IEEE 1547), volume manufacturing, and long-term field support.
In accordance with California pay transparency laws, the salary range for this position is listed below. Actual compensation may vary based on a variety of factors, including experience, education, and skills.
California Pay Range:
$222,000-$347,500 USD
The position is full-time. Compensation will be commensurate with experience.
