Arteris

Senior Manager Field Application Engineering

Arteris • $180K — $200K *
Enterprise Technology
5 - 7 years of experience
Job Overview by Ladders

Qualifications

  • 5-10 years of front-end digital SoC design experience from RTL to synthesis
  • Strong understanding of System-on-Chip architecture and semiconductor design flows
  • Proficient in AMBA AXI 3 & 4 protocols, PCIe, CXL, and chip interfaces
  • Excellent communication and presentation skills
  • Motivated to train and educate others in complex problem-solving
  • Proactive and customer-focused
  • Strong analytical and problem-solving abilities
  • Familiarity with AI workflows in SoC design

Responsibilities

  • Lead and manage Field Application Engineering teams for interconnect support
  • Mentor team members and plan resources for pre- and post-sales support
  • Define and execute customer engagements to promote account growth
  • Deliver technical keynotes, application notes, and product demos at conferences
  • Influence product roadmaps based on customer requirements
  • Collaborate with teams across multiple global regions
  • Travel 15% - 25% for customer engagements

Benefits

  • Opportunity to work on cutting-edge semiconductor technology
  • Collaborative environment with cross-functional teams
  • Influence the architecture of advanced SoC designs
  • Mentorship and leadership development opportunities
  • Exposure to global markets and diverse teams
Full Job Description
Description

[Senior Manager Field Application Engineer]

Location: [Campbell CA"]

What You'll Do as a [Senior Manager Field Application Engineer] at Arteris:

Join our innovative team and help shape the future of semiconductor technology, specifically system-on-chip (SoC) and chiplets. In this role, you will contribute to [insert a high-level purpose or function of the role], collaborating with cross-functional teams to drive impact across cutting-edge products and solutions.

Your deep understanding of digital design, from SoC architecture definition to implementation, enthusiasm for technology, creativity, problem-solving, and excellent communication skills, makes you a valued member of our customer success team.

You will have the opportunity to help influence the architecture of primary on-chip interconnects as well as the coherent interconnect of cutting edge SoC designs

Key Responsibilities:

Lead and manage Field Application Engineering teams supporting non-coherent and cache-coherent interconnect, Last Level Cache IP
  • Drive leadership through mentoring, resource planning and regional pre- and post-sales support.
  • Define and execute customer engagements across pre-sales, design-in, verification, and production to promote account growth and reduce late-stage escalations.
  • Delivering technical key notes, application notes, and product demos at the conferences.
  • Deep understanding of NoC, AMBA (AXI, ACE, AHB), OCP, system level deadlocks, SoC architecture, Verification and Emulation methodologies, ASIC design and implementation flows.
  • Influence Product Roadmaps with customer requirements/architecture.
  • Travel Expected 15% - 25%.
  • Collaborate across USA, EMEAI, APAC, Israel and India


What You Bring:
  • Minimum 5-10 years of front-end digital SoC design from RTL to synthesis.
  • Strong understanding of System-on-Chip architecture and semiconductor design flows.
  • Good knowledge of the AMBA AXI 3 & 4 protocol. PCIe, CXL, Die to Die and Chip to Chip interfaces
  • Team-oriented attitude with excellent communication / presentation skills.
  • Motivation to train and educate others to help solve complex problems.
  • Proactive, customer-focused professionalism.
  • Strong analytical and problem-solving abilities.
  • Application and use of AI and Agentic AI workflows used in SoC design


Bonus Points If You Have:
  • Familiarity with the ARM and RISC-V ecosystem (CPU, interfaces, fabrics).
  • Understanding of cache coherency and on-chip networks.
  • Knowledge of High-Performance Compute and AI Hardware Architectures
  • Knowledge of Place and Route, Timing closure, SystemC, HDL Simulation, Python, TCL, UNIX/Linux.

Education Requirements:
  • BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
  • MS preferred.

Estimated Base Salary:
  • $180,000 to 200,000 annually.

About Arteris

Arteris is a semiconductor company that provides network-on-chip (NoC) interconnect IP solutions for system-on-chip (SoC) designs. The company's products include NoC IP, NoC fabric IP, and NoC subsystem IP. Arteris was founded in 2003 and is headquartered in Campbell, California.
Learn more about Arteris
Size
100 employees
Market Cap
$135.9 million
Industry
Founded
2003
NASDAQ

Similar Jobs

More Jobs at Arteris

More Enterprise Technology Jobs

Find similar Senior Manager Field Application Engineering jobs: