Req ID: 140255
Region: Americas
Country: USA
State/Province: Texas
City: Richardson
General OverviewFunctional Area: Engineering
Career Stream: Process Engineering Manufacturing
SAP Short Name: SLE-ENG-PRM
Job Level: Level 09
IC/MGR: Individual Contributor
Direct/Indirect Indicator: Indirect
SummaryCelestica is seeking a
Senior Lead DFM and Process Engineer to apply advanced electrical, electronic, and manufacturing engineering principles to screen complex printed circuit board (PCB) design packages for manufacturability prior to release. Operating within our DFx Center of Excellence, you will conduct technical pre-DFM reviews using engineering rule sets, perform root-cause engineering analysis on layout anomalies, and collaborate directly with PCB layout and hardware engineers to resolve design discrepancies. You will also apply process engineering theory, reflow thermodynamics, and metallurgical analysis to serve as a technical subject matter expert for Surface Mount Technology (SMT) and assembly processes across assigned manufacturing sites and programs.
Detailed Description & Engineering Responsibilities- Pre-DFM Engineering Analysis: Apply electrical and electronic engineering principles, circuit layout theories, and IPC standards to analyze high-density PCB/PCBA schematics, stackups, and design packages for manufacturability, thermal dissipation efficiency, component clearance constraints, and signal/power integrity prior to release.
- Finding Disposition & Root-Cause Engineering: Perform rigorous engineering root-cause analyses on layout discrepancies (e.g., solder bridging probability, copper weight thermal carrying capacity, mechanical strain risks, component pad geometry misalignments). Collaborate directly with PCB hardware design engineers to implement engineering design modifications or establish manufacturing process control adjustments.
- Build Verification & Design Validation: Evaluate empirical test and assembly data from prototype build iterations using statistical engineering methods (e.g., Process Capability, Design of Experiments) to quantitatively validate that hardware design updates successfully eliminated physical manufacturing failure modes.
- SMT Process Engineering & Technical Support: Serve as a process engineering expert across manufacturing sites. Apply thermodynamic principles of forced-convection reflow profiling, fluid rheology of solder paste deposition, and mechanical strain analysis to resolve complex surface-mount technology (SMT) assembly defect modes and yield loss issues across assigned programs.
- Algorithmic DFM Rule Engineering: Translate complex electronic manufacturing IPC standards (IPC-2221, IPC-7351) and empirical process parameters into customized algorithmic rule sets within Valor NPI engineering software. Develop and refine custom rule encodings to continuously improve predictive DFM accuracy and prevent repeat findings across product platforms.
Deliverables Owned- Technical pre-DFM analysis reports, thermal risk assessments, and layout review findings issued prior to package release.
- Centralized engineering findings register complete with root-cause technical analyses, disposition routing, and closure verification data.
- Algorithmic Valor NPI rule encodings, custom engineering checks, and formal rule change proposals grounded in IPC manufacturing standards.
What This Role Is NotThis position is not a general design reviewer, software technician, or site-level quality inspector. The scope requires applying professional engineering principles, thermodynamic analysis, and electronic circuit theory to solve complex manufacturability and mechanical layout constraints prior to mass production.
Key Success Metrics- Pre-DFM engineering coverage on assigned packages and adherence to technical review SLAs.
- Share of logged findings successfully closed through engineered hardware redesigns or process modifications.
- Measurable reduction in repeat structural, thermal, and metallurgical DFM defects across product platforms.
Knowledge/Skills/CompetenciesKnowledge, Skills, and Engineering Competencies- Engineering Knowledge & Principles: Applied knowledge of electronic manufacturing engineering, PCB fabrication processes, signal/power integrity constraints, and SMT reflow thermodynamics.
- Industry Standards: Practical expertise in interpreting and encoding IPC engineering specifications, including IPC-2221/2222 (Generic Standard on Printed Board Design) and IPC-7351 (Requirements for Surface Mount Design and Land Pattern Standard).
- Engineering Methodologies: Applied knowledge of thermo-mechanical strain analysis, failure analysis techniques, solder alloy metallurgy, statistical process control (SPC), and Failure Mode and Effects Analysis (FMEA).
- Software & CAD/CAE Tools: Hands-on experience executing pre-DFM screening workflows, building rule-based algorithms, and maintaining rule encodings within Valor NPI or equivalent EDA tools.
- Cross-Functional Engineering Collaboration: Strong technical communication skills to disposition findings directly with PCB layout designers, hardware design engineers, and site manufacturing teams.
Physical DemandsPhysical Demands- Duties of this position are performed in a normal office environment.
- Duties require sustained visual concentration on complex engineering design files, schematics, computer monitors, and numerical data sets.
- Repetitive manual movements (e.g., data entry, using a computer mouse, utilizing CAD/EDA software tools) are frequently required.
- Occasional travel to manufacturing sites may be required.
Typical ExperienceTypical Experience- 4 to 6 years of professional engineering experience in process engineering, electronics manufacturing engineering, PCB design engineering, or DFM engineering.
Typical EducationBachelor degree or consideration of an equivalent combination of education and experience.
Educational Requirements may vary by Geography
NotesNotesThis job description is not intended to be an exhaustive list of all duties and responsibilities of the position. Employees are held accountable for all duties of the job. Job duties and the % of time identified for any function are subject to change at any time.