Full Job Description
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X In most instances, this position requires in-person interviews as part of the hiring process.Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Austin, TX, USA; Mountain View, CA, USA; Portland, OR, USA; Poughkeepsie, NY, USA.
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
5 years of experience in verification methodologies and languages such as Universal Verification Methodology (UVM) and SystemVerilog.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience in low-power design verification.
Experience with Universal Verification Methodology (UVM), SystemVerilog, or other scripting languages such as Python, Perl, Shell, Bash, etc.
Knowledge of operating systems such as Linux and Android.
Familiarity with Advanced RISC Machine (ARM) instruction set architecture.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
US: $163000 - $236000 (USD) 15% bonus target equity benefits
Learn more about benefits at Google .
Responsibilities
Verify designs using verification techniques and methodologies.
Work cross-functionally to debug failures and verify the functional correctness of the design.
Provide test plans, including verification strategy, environment, components, stimulus, checks, and coverage, and ensure documentation is easy to use.
Perform design verification for future CPU developments.
Perform functional verification and performance validation for both pre-silicon.
