Role Overview

We are seeking an experienced RTL Lead to help drive the implementation of Velaura's next-generation Physical AI SoC. This role combines architectural influence with hands-on technical leadership. You will work closely with system architects, AI architects, performance modelers, and software engineers to transform innovative architectural concepts into production-quality silicon. The ideal candidate is equally comfortable discussing system-level tradeoffs and reviewing critical RTL microarchitecture. You should enjoy solving challenging technical problems, mentoring
engineers, and helping build a high-performance engineering culture.

Responsibilities
• Lead RTL development across key portions of the Velaura SoC.
• Collaborate with architects to translate system requirements into robust microarchitectures.
• Drive hardware/software co-design across AI workloads, memory systems, runtime software, and system architecture.
• Partner closely with software teams to define programming models, execution flows, memory hierarchies, and performance-critical interfaces.
• Drive design decisions across compute engines, memory subsystems, interconnect, control logic, and system infrastructure.
• Develop high-quality, power-efficient, and scalable RTL implementations.
• Conduct architecture and RTL reviews to ensure performance, power, and area goals are achieved.
• Work closely with performance modeling, verification, physical design, and software teams throughout the development cycle.
• Help establish engineering processes and design methodologies as the organization grows.
• Mentor and develop other RTL engineers.

Required Qualifications
• Strong RTL design experience in complex SoCs, CPUs, GPUs, AI accelerators, networking devices, or related systems.
• Deep understanding of digital design fundamentals and microarchitecture.
• Experience with Verilog/SystemVerilog and modern RTL development methodologies.
• Familiarity with memory systems, interconnect fabrics, cache hierarchies, and system-level data movement.
• Experience balancing performance, power, area, and design complexity.
• Proven ability to drive complex technical projects from concept through silicon bring-up.
• Experience with hardware/software co-design and performance optimization across the full system stack.
• Familiarity with AI runtimes, operating systems, firmware, drivers, or other system software layers is highly desirable.

Preferred Qualifications
• Experience with AI accelerators, machine learning hardware, or edge AI platforms.
• Experience with robotics, autonomous systems, automotive, aerospace, or other real-time computing environments.
• Knowledge of low-power design techniques and power management architectures.

$200,000 - $500,000 a year

Compensation & Benefits

At Velaura, we believe exceptional talent deserves exceptional rewards. Compensation for this role includes a competitive base salary, performance-based incentives, and equity participation, allowing team members to share in the company's long-term success.

Your base pay will depend on your skills, qualifications, experience, and location.

In addition to compensation, Velaura offers a comprehensive benefits package that may include medical, dental, and vision coverage; paid time off; flexible work arrangements; professional development opportunities; and other benefits designed to support the well-being and growth of our team.

Velaura is committed to pay equity and transparency and regularly benchmarks compensation to ensure we remain competitive in the market.