M.S. or Ph.D. in Electrical Engineering or related field.
3+ years of experience in power delivery and power integrity analysis for high-performance CPUs and compute SoCs.
Proficiency with PowerSI, PowerDC, IDEM, H-Spice, and Keysight ADS simulation tools.
Experience in DC-DC converter design.
Knowledge of PCB design and layout considerations for power integrity, including layer stack-up and capacitor placement.
Strong problem-solving skills related to power integrity issues.
Responsibilities
Support design and analysis of Power Delivery Networks (PDNs) for digital and analog SoCs.
Assist in modeling regulator characteristics for component selection.
Use simulation tools to extract PCB and package impedance profiles.
Perform simulations to evaluate supply rail behavior and identify issues.
Conduct lab measurements to validate power integrity design.
Collaborate with hardware designers and engineers to implement PDN improvements.
Participate in design reviews and document analysis results.
Benefits
Comprehensive Health Care Plan (Medical, Dental & Vision)
Retirement Savings Matching Program
Life Insurance (Basic, Voluntary & AD&D)
Generous Time Off (Vacation, Sick & Public Holidays)
Paid Family Leave
Short and Long Term Disability
Training & Development
Commuter Benefits
Flexible, hybrid workplace model
Equity grants (for full-time employees)
Full Job Description
About This Role
Lightmatter is looking for a Power Integrity engineer to drive the next generation products from concept to development. You will be part of the Signal Integrity, Power Integrity and Packaging team, tasked with influencing the package and system architecture, design, and analysis through lab bring-up to meet the product's power integrity requirements. This position offers a unique opportunity to solve complex interactions across digital, analog and photonics domains while meeting stringent power integrity goals. Responsibilities
Support the design and analysis of Power Delivery Networks (PDNs) for digital and analog SoC domains, including path from voltage regulators to on-chip decoupling capacitors.
Assist in modeling regulator characteristics such as switching ripple and transient response to aid in component selection (controllers, passives, etc.).
Use commercial simulation tools (e.g., 2.5D EM solvers) to extract PCB and package impedance profiles and help generate N-port models.
Perform basic time-domain and frequency-domain simulations to evaluate supply rail behavior and identify potential issues such as voltage droop or overshoot.
Conduct lab measurements to validate power integrity design, including use of programmable loads and oscilloscopes to capture transient response.
Work closely with hardware designers, layout engineers, and system integrators to implement PDN design improvements and validate results.
Participate in design reviews and contribute to documentation of analysis results, test procedures, and design recommendations.
Help monitor and review PDN constraints during layout and provide feedback based on simulation or measurement data.
Support senior engineers in system-level tradeoff studies and architectural evaluations related to power integrity.
Qualifications
M.S. or Ph.D. in Electrical Engineering or a related field.
3+ years of experience in power delivery and power integrity analysis for high performance CPUs and compute SoCs.
Proficiency in using simulation and analysis tools for power integrity, including PowerSI, PowerDC, IDEM, H-Spice and Keysight ADS.
Experience in DC-DC converter design.
Experience with PCB design and layout considerations for power integrity, including layer stack-up assignment, power plane partitioning, capacitor selection and placement, and microvia/PTH design.
Strong problem-solving and debugging skills for power integrity-related issues.
Preferred Qualifications
Working knowledge of different 2D/2.5D/3D packaging technologies and associated PDN challenges.
Familiarity in using lab equipment for signal measurement and characterization, such as oscilloscopes and network analyzers.
Proficiency in scripting languages such as Skill, TCL, Python, and Matlab for automation of design and modeling flows and post-processing results
We offer competitive compensation. The base salary range for this role determined based on location, experience, educational background, and market data.
Salary Range: total compensation goes beyond base salary, it also includes a new hire equity grant, annual performance-based equity, and other rewards that recognize your impact and contribution.
$157,000-$176,000 USD
Benefits
Comprehensive Health Care Plan (Medical, Dental & Vision)
Retirement Savings Matching Program
Life Insurance (Basic, Voluntary & AD&D)
Generous Time Off (Vacation, Sick & Public Holidays)
