OverviewRambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire a Mixed-Signal Design Intern to join our Memory Interconnect Design team in San Jose, California. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer.
Responsibilities
- Design and simulate high-speed Mixed-Signal custom circuits
- Research and implement optimal low power architecture
- Work with layout team to achieve post extraction performance
- Document analysis and simulation to show that design achieves electrical, timing parameters and pre-silicon verification flow
- Work under the supervision of Sr. Design Engineers on the team
Qualifications
- Enrolled in MS EE or PhD EE with a minimum GPA of 3.5/4.0
- Course work or experience in CMOS mixed-signal circuit design
- Good knowledge of basic circuit and timing design principles
- Some knowledge of Verilog-A, Verilog is desirable
- Strong work ethics and ability to work with diverse team
Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership.
The US hourly range for this full-time position is $32.20 to $59.80. Our salary ranges are determined by role, level and location. The successful candidate’s starting pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.
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