THE ROLE:

As an Lead SMU (System Management Unit) Validation Engineer in the Data Center and GPU Accelerated Processing Division, you will drive SMU hardware and power-management validation for AMD Data Center GPU products across pre-silicon, bring-up, post-silicon enablement, and system-level debug.You will own key areas of validation strategy and execution while partnering with architecture, design, firmware, diagnostics, platform, automation, customer engineering, and program teams to deliver high-quality next-generation AI and HPC products.

THE PERSON:

The ideal candidate is a motivated technical leader with strong experience in SoC power-management validation, SMU hardware features, firmware interactions, subsystem communication, and system-level debug.

You can independently drive validation planning, issue triage, root-cause analysis, and closure while influencing cross-functional teams, mentoring engineers, and communicating clearly with technical and program stakeholders.

KEY RESPONSIBILITIES:

• Own SMU hardware validation planning and execution across emulation, ASIC bring-up, post-silicon enablement, regression, and sustaining phases.

• Develop validation plans for SMU sub-blocks and power-management features, includingbootcode, clocking, fuse, SMN, SMUIO, thermal, RSMU, security-related interactions, and other system-management functions.

• Lead debug triage, root-cause analysis, and issue closure across hardware, firmware, platform, diagnostics, and system-level interactions.

• Partner with architecture, design, firmware, diagnostics, platform, automation, customer engineering, and program teams to align scope, risks, dependencies, and exit criteria.

• Build and improve automation, validation content, debug-analysis scripts, and regression checks to improve coverage, efficiency, and repeatability.

• Review RTL, specifications, firmware interfaces, register maps, and validation collateral toidentifycoverage gaps and improve validation effectiveness.

• Support lab-based and system-level debug using platform tools, firmware logs, register-level analysis, and standard measurement equipment.

• Support customer and sustaining issues by providing SMU technicalexpertise, debug guidance, and issue-resolution support.

• Mentorengineers andhelp improve team validationmethodology, debug practices, and product quality.

PREFERRED EXPERIENCE:

• Strong experience in semiconductor validation, silicon bring-up, SoC validation, firmware validation, or hardware/software integration.

• Hands-on experience with power-management validation, SMU/PMFW functionality, SoC control fabrics, clocking, reset, fuse, thermal, voltage-regulator, or platform-management features.

• Experience developing validation plans, test content, automation, anddebugmethodologies for complex SoC or GPU products.

• Strong debug skills across hardware, firmware, software, diagnostics, and platform interactions.

• Experience with emulation, simulation, or FPGA/prototyping environments.

• Proficiencyin Python and C/C++ for automation, test infrastructure, or debug-analysis tools.

• Familiarity with Linux, lab bring-up, register-level debug, firmware logs, and platform debug tools.

• Ability to execute independently, manage priorities, influence cross-functional teams, and drive technical issues to closure.

ACADEMIC CREDENTIALS:

• Bachelor99s ormaster99s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field preferred.

LOCATION:

Markham, ON

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Benefits offered are described: AMD benefits at a glance.

This posting is for an existing vacancy.