Cadence Design Systems

Lead C++ Software Engineer

Cadence Design Systems • $101K — $188K *
Information Technology
Less than 5 years of experience
Job Overview by Ladders

Qualifications

  • MS with 2 years' experience or Ph.D. in engineering or computer science
  • Strong understanding of data structures and algorithms
  • Proficiency in C++, gdb debugging and software development
  • Familiarity with Linux/Unix development
  • Knowledge of build and version-control systems
  • Coursework in Hardware Description Language (Verilog, SystemVerilog, VHDL)
  • Exposure to electronic design platforms

Responsibilities

  • Develop cutting-edge, high-performance emulator compilers
  • Utilize creativity and problem-solving skills for software design
  • Implement multi-threading and distributed computing techniques
  • Address large-scale compilation challenges such as optimization
  • Conduct logic optimization, partitioning, and scheduling tasks

Benefits

  • Paid vacation and holidays
  • 401(k) plan with employer match
  • Employee stock purchase plan
  • Variety of medical, dental, and vision plan options
  • Incentive compensation including bonuses and equity
Full Job Description

The Cadence Palladium Platform is world most scalable emulation system that verifies most of the latest design innovations in electronics worldwide. We are looking for a talented engineer to join our team and contribute to the world’s fastest emulator compiler development. You’ll have a great opportunity to make a difference by applying your creativity and problem-solving skills, learn and/or apply multi-threading/distributed computing to solve large scale compile problems such logic optimization, partitioning and scheduling.  

Strong understanding of software data structure and algorithms and proficiency in C/C++ are basic job requirements.

Requirements

  • MS. With 2 year experience or Ph.D in engineering, computer science or related field.
  • Strong understanding of data structures, algorithms and databases.
  • Demonstrated proficiency in C++, gdb debugging, and general software development skills
  • Familiarity with Linux/Unix development.
  • Exposure to build and version-control systems.
  • Coursework in Hardware Descript Language, such as Verilog, SystemVerilog, VHDL.
  • Exposure to electronic design platforms.

The annual salary range for Massachusetts is $101,500 to $188,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

About Cadence Design Systems

Cadence Design Systems, Inc. is an American multinational electronic design automation software and engineering services company, founded in 1988 by the merger of SDA Systems and ECAD, Inc. The company produces software, hardware and silicon structures for designing integrated circuits, systems on chips (SoCs) and printed circuit boards.
Learn more about Cadence Design Systems
Size
9,300 employees
Market Cap
$43.9 billion
Industry
Net Income
$590.6 million
Founded
2018
5 Year Trend
+10.5%
Revenue
$2.6 billion
NASDAQ

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