As an HBM SOC Design Engineer, you will be responsible for the design & development of next-generation HBM DRAM products. You will be part of a highly multi-functional team of technical domain experts collaborating closely with a distributed team of Design Engineering, Product Engineering, Process Development, Package Engineering & Business Units to implement a common goal of ensuring our future HBM roadmap is successful. You will apply your deep understanding of SOC Architecture, RTL Logic Design, IP Integration, high-speed interface design, high-performance computing architectures, and 2.5D & 3D package integration to understand and analyze bottlenecks and propose innovative architectures to target best-in-class performance, power, cost, reliability and quality for Micron's HBM product portfolio. Our team vision is a continuing desire to develop your skills working in an inclusive diverse environment of multicultural Teams across worldwide geographies! Enabling the creative career path you deserve with a collaborative environment and groundbreaking technology and growing upon your imagination and creativity. Responsibilities • Analyze customer requirements and specification documents, work with IP vendors to select off-the-shelf IPs, and modify or custom design new ones if needed. • Review architectural specifications and provide constructive feedback to help create high-quality specifications. • Writing specifications, developing RTL, integrating IP, testing code, debugging failures, running static checks and resolving issues identified by static checks • Proactively identify and flag quality issues, performance problems, and opportunities to reduce power consumption in architecture, microarchitecture, RTL, or circuits. • Debug and identify root causes and solutions for pre-silicon and post-silicon issues encountered in current HBM products and architectures. Minimum Qualifications • 3+ years of relevant job/skill-related experience. • Proficiency in microarchitecture and high-quality RTL development with the ability to write and test code in System Verilog. • Experience dealing with clock domain crossings (CDC), static timing analysis, synthesis design constraints, and closing timing by using logic techniques, false path constraints, and multi-cycle path constraints. • Experience with SOC interconnects and bus standards like AMBA AXI, ACE, APB, AHB, etc. • Understanding of design for testability concepts such as MBIST and scan and how to write RTL for testability. Preferred Qualifications • BSEE or higher with a track record of innovation and problem-solving in high-performance and/or low power SOC development • Familiarity with scripting languages such as Python • Experience with working on one or more of the following IPs: UCIE, Memory Controller, NOCs. • The ability to efficiently synthesize and convey sophisticated technical concepts to other partners and leadership • A self-motivated, hard-working team player who enjoys working with diverse abilities and backgrounds As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.