Zachary Piper Solutions is seeking an
FPGA Design & Analysis Engineer III to support a leading aerospace and defense program in
El Segundo, CA. This role will focus on advanced FPGA development, integration, and implementation for next-generation microelectronics systems. The ideal candidate will have strong hands-on experience with
Xilinx/AMD FPGA technologies, HDL development, timing closure, and FPGA implementation activities. This is a fully onsite role located in El Segundo, CA. Candidates must hold an active secret clearance.
Responsibilities Include:- Analyze system and customer requirements to develop FPGA architectures and detailed design solutions.
- Maintain and expand existing FPGA top-level designs by implementing new functionality and interfaces.
- Integrate third-party and internally developed IP cores into FPGA-based systems.
- Create and update FPGA constraint files and implementation strategies.
- Perform synthesis, simulation, place-and-route, and timing closure activities.
- Troubleshoot and resolve static timing violations and design implementation issues.
- Program and validate FPGA devices, primarily utilizing Xilinx/AMD Versal, UltraScale, and UltraScale+ product families.
- Support hardware/software integration, verification, and system-level testing efforts.
- Participate in design reviews, technical analyses, and engineering documentation activities.
- Collaborate with system, software, and hardware engineering teams throughout the product lifecycle.
Required Qualifications Include:- Bachelor's degree in Engineering, Computer Science, Mathematics, Physics, Chemistry, or related technical discipline.
- 2+ years of FPGA design experience.
- Strong experience with AMD/Xilinx Vivado.
- Proficiency in Verilog and/or SystemVerilog.
- Experience with advanced FPGA implementation techniques, including:
- Synthesis
- Place-and-Route
- Timing Closure
- Constraints Management
- Demonstrated ability to develop complex HDL designs beyond simple IP integration.
- Experience troubleshooting and resolving static timing violations.
Preferred Qualifications:- 5+ years of FPGA and/or ASIC design experience.
- Experience with Xilinx/AMD Versal devices.
- Advanced FPGA architecture, implementation, and optimization expertise.
- Experience supporting hardware/software integration in complex embedded systems.
Required Skills:- FPGA Design
- AMD Vivado
- Xilinx FPGA Technologies
- Verilog/SystemVerilog
- Timing Closure
- FPGA Constraints
- Synthesis & Place-and-Route
Salary and Benefits Include:- Salary Range: $120,000-135,000 depending on experience
- Full Benefits: Cigna Medical, Dental, Vision, 401K, PTO, Sick Leave if required by law, and Holidays
