About the roleBuild the platform that brings silicon to life beforetapeout.TYLsemi is developing purpose-built connectivity chiplet for HPC/rack-scale AI systems. We are seeking a Principal Engineer Emulation Lead to create scalable pre-silicon environments that enable firmware, software, and system validation months before first silicon arrives. You'll build production-grade platforms that boot real software, run meaningful workloads, expose system bottlenecks, and accelerate product readiness across the organization.
What You'll Do- Architect and deploy full-chip, multi-die, and subsystem emulation environments using Palladium, ZeBu, Veloce, or similar platforms.
- Enable pre-silicon bring-up of boot ROM, firmware, drivers, operating systems, and application workloads.
- Develop scalable emulation methodologies and reusable infrastructure,
- Drive system-level validation, performance analysis, and root-cause debug across RTL, firmware, software, and verification.
- Build automation, CI/CD workflows, regressions, and release processes that scale across engineering teams.
- Partner with architecture, design, verification, firmware, DFT, and post-silicon teams to reduce product risk before tapeout.
- Influence methodology, observability, debugability, and overall silicon readiness.
- Lead complex debug spanning RTL, firmware, software, and hardware platforms.
- Mentor engineers and influence architecture to improve observability, diagnosability, and product quality.
What We're Looking For- 10+ years of ASIC/SoC development experience with significant emulation ownership.
- Expertise with commercial emulation platforms (Palladium, ZeBu, or Veloce).
- Strong RTL skills in Verilog/SystemVerilog.
- Experience with firmware bring-up, embedded processors, interrupts, and system debug.
- Proficiency in C/C++ and scripting with Python.
- Excellent cross-functional debugging and technical leadership skills.
- Proven track record leading complex verification and emulation programs.
Nice to Have- Ethernet, PCIe, CXL or high-speed interconnects.
- FPGA prototyping (Protium, HAPS, etc.).
- Security architectures, Root of Trust, and secure boot.
- First-silicon bring-up and system qualification experience.
READY TO JOIN?The pay range for this role is:
237,500 - 286,000 USD per year (US)
