Job Details:Job Description: Intel's APTM organization is seeking a highly driven and execution-focusedEMIB-T Substrate Yield Lead to lead yield performance for next-generation advanced packaging technologies, including EMIB-T (Embedded Multi-die Interconnect Bridge with TSV), Intel's most advanced platform for heterogeneous integration. This is a high-visibility, high-accountability role with significant responsibility for enabling successful technology development and manufacturing readiness across both Intel Foundry Services (IFS) and Intel Product Groups (IPG).
The ideal candidate is a self-starter who thrives in ambiguous and fast-paced environments, proactively drives issues to closure, and requires minimal supervision. Success in this role requires strong technical depth, urgency in execution, the ability to influence cross-functional teams and suppliers, and a relentless focus on delivering yield and program milestones.
Key Responsibilities
Own end-to-end substrate yield performance for EMIB-T technology development and manufacturing readiness.
Drive DFM/DFY engagement, defect pareto closure, process optimization, and yield improvement plans from signal identification through execution.
Lead daily yield huddles and cross-functional reviews to ensure program execution remains on track and yield risks are identified and addressed with urgency.
Proactively identify, prioritize, and drive closure of critical yield, reliability, process, and supplier-related issues with minimal management oversight.
Partner closely with substrate suppliers, substrate module engineers, substrate integration, manufacturing teams, design teams, Q&R organizations, and platform integration to achieve technology and business milestones.
Establish clear accountability, track actions, challenge roadblocks, and ensure commitments are delivered on schedule.
Drive yield readiness assessments, risk mitigation plans, and executive communications for program reviews.
Define and scale the yield intelligence infrastructure needed for EMIB-T, including dashboards, automated analytics, computer vision, AI/ML defect detection, and automated defect classification.
Enable successful EMIB-T deployment and scaling across multiple products and business groups, supporting both IFS and IPG programs.
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
Masters degree with 6+years or PhD with 4+years in Engineering, Materials Science, Physics, Chemistry, Data Science, or a related technical discipline.
5+ years of experience in semiconductor manufacturing, advanced packaging, substrate technology, yield engineering, process engineering, or a closely related field.
Hands-on experience in substrate, advanced packaging, or semiconductor yield engineering, including statistical analysis, defect reduction, process optimization, SPC, DFM/DFY, defect metrology, failure analysis, and HVM execution.
Strong analytical and problem-solving skills with the ability to make data-driven decisions in complex environments.
Experience working across multiple organizations and influencing stakeholders to achieve results.
Demonstrated ability to independently manage complex technical issues, execute with urgency, and drive actions to closure.
Experience developing or deploying yield monitoring systems, automated analytics, dashboards, image analytics, computer vision, AI/ML-based defect detection, or automated defect classification systems.
Preferred Qualifications
Experience working directly with substrate suppliers and external manufacturing partners.
Demonstrated program leadership experience, including coordinating cross-functional technical teams and driving execution in high-visibility, high-impact environments.
Experience with advanced packaging technologies, including EMIB, EMIB-T, TSV, 2.5D/3D integration, substrates, or heterogeneous integration.
Prior experience supporting technology development, qualification, and manufacturing ramp of advanced semiconductor technologies.
Job Type:Experienced Hire
Shift:Shift 1 (United States of America)
Primary Location: US, Arizona, Phoenix
Additional Locations:
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $180,770.00-255,200.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
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