General Summary:Qualcomm is a global leader in semiconductor and wireless technology, with a decades-long track record of delivering silicon that defines industry standards. Our SerDes IP is deployed at hyperscale across the world's most demanding data infrastructure - giving engineers on this team rare access to real-world deployment feedback, cutting-edge process nodes, and a deep bench of domain expertise that few organizations can match.
New PositionAbout the Team:High-speed SerDes is the backbone of modern data infrastructure. As AI workloads, cloud computing, and hyperscale networking continue to scale, the demand for faster, more power-efficient interconnects has never been greater - and our team is at the center of it. Our High-Speed SerDes DSP group builds the DSP engines that power PCIe, 112G and 224G SerDes solutions deployed across the world's leading data centers, networking platforms, and next-generation connectivity products. We operate at the intersection of theory and silicon - from architecture and algorithm design through bring-up and customer deployment. We're a close-knit team that values both technical depth and collaborative problem solving. The work is demanding and the pace is fast, but we tackle hard problems together, and we take pride in delivering solutions that are technically rigorous and practically impactful.
About the Role:We're looking for a Staff DSP Systems Engineer who brings strong technical fundamentals, a methodical approach to problem solving, and a genuine passion for high-speed signal processing. You'll work closely with a team of specialists across DSP, RTL, Firmware, and Post-Silicon disciplines - contributing to algorithm development, model building, diagnostic tooling, and silicon validation on some of the most technically challenging SerDes problems in the industry. High performers naturally grow into ownership across DSP subsystems and become trusted technical voices on the team. This is a role for engineers who want to develop deep expertise, collaborate with talented peers, and build solutions that ship in real products at global scale.
Responsibilities:
- Design and refine high-speed DSP SerDes features and architectures in collaboration with RTL/Firmware designers; actively participate in implementation and design reviews.
- Develop and maintain bit-accurate and cycle-accurate MATLAB models for RTL verification, pre-silicon performance estimation, and post-silicon correlation.
- Research and analyze DSP algorithms addressing power, performance, and area trade-offs across equalization, LMS adaptation, CDR, noise mitigation, linearity, and related topics across the full DSP signal chain.
- Develop and analyze DSP diagnostic features and performance metrics - including SNR, eye monitoring, BER floor, linearity, and jitter - to proactively identify design limitations and drive continuous improvements.
- Partner with Firmware, DV, and Post-Silicon teams by providing clear theory of operation documentation, pseudocode, and DSP sequences to support product bring-up, regression testing, and post-silicon lab debug.
Skills:- Strong proficiency in MATLAB, Python, and C/C++; embedded firmware experience strongly desired.
- Solid RTL and digital design fundamentals - comfortable driving simulations, participating in code reviews, and debugging failures with a systematic, methodical approach.
- Proven DSP architecture experience in mixed-signal SerDes, including adaptation/calibration, clocking, equalization, and FEC - with the depth to understand where theory meets its limits in silicon.
- Skilled in developing DSP diagnostic tools and analyzing performance metrics - BER, SNR, jitter, eye characterization - to isolate root causes and support team-wide debug and resolution efforts.
- Solid grasp of post-silicon debug, voltage/temperature effects on performance, analog continuous-time circuits, ADCs, and noise/transfer function analysis.
- Strong cross-functional collaboration skills - able to work effectively across RTL, Firmware, DV, and Post-Silicon teams, contribute constructively in technical discussions, and build consensus around complex engineering trade-offs.
- Clear and precise technical communication skills - able to produce well-structured theory of operation documents, pseudocode specifications, and diagnostic summaries that are accessible to both technical and cross-functional audiences.
Preferred Experience/Education: - 8+ years of experience, or Bachelor's with 10+ years of relevant experience.
- Hands-on experience with DSP-based PCIe, 112G, 224G, or higher-speed SerDes architectures shipping in real products.
Minimum Qualifications:• Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience.
OR
Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience.
OR
PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience.
Pay range and Other Compensation & Benefits:$110,500.00 - $160,500.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer.
If you would like more information about this role, please contact Qualcomm Careers.
