Full Job Description
A major success factor for the company continues to be the development and deployment of breakthrough Digital/DSP and mixed signal ASICs that drive the performance and value of new products. We have an exciting opportunity for a Physical Design R&D engineer responsible for the physical implementation and tape release of digital and mixed signal ASICs.
Responsibilities
About the Team:
We are located in Colorado Springs, Colorado at the base of Pikes Peak. You'll collaborate in a team environment to develop ASICs that meets customer functionality, schedule, and quality requirements. This job will be part of Keysight Laboratories, a world-renowned technology organization which enables Keysight to be first to market with breakthrough products and solutions.
Responsibilities:
Digital Physical Design ASIC R&D engineer responsible for both module level as well as SoC Level implementation from RTL to GDS of digital and mixed signal ASICs. Solves complex and high impact design and development problems including customer application issues of varying scope and complexity. Uses product and customer applications knowledge to determine, define, develop, and validate design concepts and methods.
3 Participate in the entire spectrum of full ASIC design activities including definition, architectures, digital logic design, IP validation and synthesis.
3 Responsible for floor planning, place and route, timing closure, static timing analysis (STA), formal verification, low power design, clock distribution, EMIR analysis and physical verification
3 Close sign-off checks, interface with industry foundries and GDS delivery
3 Work extensively with cross functional teams to guide architecture with physical design constraints
3 Develop tool flows and drive vendors to achieve milestones
Qualifications
Bachelors or master's degree in electrical or computer engineering. Typically, 0 - 2 years relevant experience.
Basic Qualifications:
3 Desire to identify and debug problems.
3 Strong EE fundamentals with experience in ASIC Design, digital architectures/systems, digital circuit synthesis, and verification of large and mixed signal ASIC designs
3 Leadership skills to gain credibility and respect to drive change and influence teams and partners towards higher levels of execution, return, and productivity
3 Strong teamwork and written/verbal communication skills
Wanted Qualifications:
3 Experience with Innovus and Tempus
3 Experience with task automation and scripting
3 Experience in digital and analog ASIC design flow, methodologies, and process
3 Experience with DFT architecture and implementation
3 Fluent with object-oriented programming
3 Ability to multi-task and to engage with multiple projects, engineers, and partnerships
Other Information:
3 Relocation is available for this position
3 Visa Sponsorship is not available for this position
Most offers will be between the minimum and the midpoint of the Salary Range listed below.
MIN $96,150.00 - MAX $160,250.00
Note: For other locations, pay ranges will vary by region
This role is eligible for Keysight Results Bonus Program
US Employees may be eligible for the following benefits:
3 Medical, dental and vision
3 Health Savings Account
3 Health Care and Dependent Care Flexible Spending Accounts
3 Life, Accident, Disability insurance
3 Business Travel Accident and Business Travel Health
3 401(k) Plan
3 Flexible Time Off, Paid Holidays
3 Paid Family Leave
3 Discounts, Perks
3 Tuition Reimbursement
3 Adoption Assistance
3 ESPP (Employee Stock Purchase Plan)
3 Restricted Stock Units
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