THE ROLE:

AMD is looking for a highly motivated Digital Design Engineer to join our team developing next-generation PCI Express (PCIe) IP that powers AMD's industry-leading server, client, GPU, and semi-custom products. In this role, you will contribute to all aspects of ASIC RTL design, from architecture definition and microarchitecture development through implementation, verification support, and post-silicon bring-up. You will collaborate with a talented global team to create innovative, high-performance, and power-efficient designs that enable cutting-edge computing solutions.

THE PERSON:

The ideal candidate is a passionate and detail-oriented engineer who enjoys solving complex technical challenges and delivering high-quality results. You are driven by continuous learning, thrive in collaborative environments, and take ownership of your work from concept to completion. You communicate effectively across cross-functional teams and demonstrate a strong commitment to innovation, execution, and engineering excellence.

Key characteristics for success include:

• Strong problem-solving and analytical skills with a focus on quality and execution.
• Self-motivated learner with the ability to quickly acquire new technical skills.
• Collaborative team player who can also work independently with minimal guidance.
• Effective communicator capable of clearly presenting technical concepts and ideas.
• Creative thinker with a passion for innovation and attention to detail.
• Committed to meeting project milestones while maintaining engineering rigor.

KEY RESPONSIBILITIES:

• Design and develop RTL for AMD's PCI Express (PCIe) IP used across next-generation server, client, GPU, and semi-custom products.
• Partner with architects and design teams to define and implement innovative microarchitectural features.
• Drive high-quality RTL development with focus on timing closure, CDC analysis, lint compliance, and overall design robustness.
• Implement and optimize low-power design techniques while maintaining performance and functionality targets.
• Collaborate with verification engineers to support simulation, debug, validation, and issue resolution throughout the project lifecycle.
• Participate in silicon bring-up activities and contribute to debugging post-silicon and customer-reported issues.
• Support design reviews and continuously improve design methodologies and development processes.

PREFERRED EXPERIENCE:

• Extensive experience in ASIC/SoC digital design and RTL development using Verilog/SystemVerilog.
• Strong understanding of synchronous digital design principles and multi-clock domain implementations.
• Hands-on experience with lint, CDC, and timing analysis methodologies and tools.
• Experience creating or contributing to technical specifications and microarchitecture documentation.
• Knowledge of low-power design techniques and ASIC design flows.
• Familiarity with silicon validation and hardware debug using lab equipment such as logic analyzers and oscilloscopes.
• Understanding of high-speed interface protocols such as PCI Express (PCIe), USB, SATA, Ethernet, or similar technologies.
• Experience collaborating across architecture, verification, physical design, and silicon validation teams.

ACADEMIC CREDENTIALS:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, Engineering Science, or a related field.
• Master's degree preferred.

LOCATION:

Vancouver, British Columbia, Canada

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Benefits offered are described:  AMD benefits at a glance.

This posting is for an existing vacancy.