5-7 years of hands-on ML compiler experience with a track record of shipping compiler passes
Deep understanding of PyTorch internals, including its compilation stack
Familiarity with modern LLM architectures, particularly attention mechanisms and quantization schemes
Ability to navigate the complexities of getting architectures to run correctly and efficiently
Experience designing and extending compiler infrastructure in evolving codebases
Proficiency in Python, with knowledge of C++ or Rust as a plus
Comfortable working with hardware in development stages, from simulation to bring-up
Responsibilities
Bring up frontend and mid-level support for new LLM architectures in the compiler
Extend IR, ops, and lowering passes to accurately represent new architectural primitives
Implement quantization schemes and numeric formats to maintain model accuracy
Monitor the LLM architecture landscape to guide future development
Facilitate handoffs of lowered programs to backend compiler engineers for hardware mapping
Collaborate with LLM serving engineers to transition new models from compiler support to deployment
Benefits
Opportunity to publish research and contribute to cutting-edge technology
Work in a dynamic, research-adjacent environment
Engage with a team focused on innovative hardware and software solutions
Be part of a pioneering company at the forefront of ML compiler development
Collaborative culture that values cross-team communication and knowledge sharing
Full Job Description
The Role
Normal's hardware runs the most memory-bound parts of large-model inference inside memory itself, rather than shuttling weights to a processor. The software that makes this programmable doesn't exist yet in any standard form. Our compiler is how models reach that hardware, and new LLM architectures show up faster than most compilers can track. A new attention variant, MoE routing scheme, or quantization approach has to be represented faithfully in our compiler before it can run, let alone run fast. As a Compiler Engineer focused on frontend and model bring-up, you will extend our IR, ops, and lowering passes so new LLM architectures are supported before a customer asks for them.
This is a research-adjacent seat: you are expected to follow the literature closely, and publish on behalf of Normal. Our chip is pre-silicon, so you will validate bring-up against our simulators and FPGA prototypes first, so that models are ready to run when silicon arrives. What You Will Own
Model Bring-up: Bring up frontend and mid-level support for new LLM architectures in our compiler, from attention variants to MoE routing schemes. Success means new architectures run correctly on our stack soon after release, ahead of customer demand.
IR and Lowering: Extend our IR, ops, and lowering passes to represent new architectural primitives faithfully rather than approximately, with test coverage that keeps them correct as the compiler evolves.
Quantization and Numerics: Represent the quantization schemes and numeric formats new models use, so lowering preserves model accuracy.
Architecture Tracking: Track the LLM architecture landscape closely enough to recommend what the team brings up next.
Cross-Team Handoffs: Hand lowered programs to the backend compiler engineers who map them onto our hardware, and work with our LLM serving engineer to take new models from compiler support to serving.
What Makes You a Great Fit
Hands-on ML compiler experience: you have written and shipped compiler passes
Deep familiarity with PyTorch internals, ideally including its compilation stack (TorchDynamo, FX, torch.export)
Working knowledge of modern LLM architectures at the level of attention mechanisms, MoE routing, and quantization schemes
Patience for the unglamorous part of the job: getting a new architecture from "runs" to "runs correctly" to "runs correctly and fast"
Comfort designing compiler infrastructure in a young codebase as well as extending an established one
Comfort building software for hardware that is still evolving, from simulation through bring-up
Fluency in Python, and familiarity with C++ or Rust
Bonus Points
Experience with other ML compilers, such as IREE, XLA, or TVM
Familiarity with other ML frameworks and graph formats, such as JAX or ONNX
Experience partitioning models across devices with tensor, pipeline, or expert parallelism
Experience with hardware-software co-design
Experience with non-standard or in-memory hardware targets
Contributions to open-source compiler or ML infrastructure projects
