ITAR Notice: This role involves access to ITAR-controlled information. Applicants must be U.S. persons (U.S. citizens, U.S. permanent residents, asylees, or refugees) per 22 CFR 120.62
About the roleOwn MLIR dialect design and lowering passes for our AI accelerator - defining the high-level tensor IR, async / streaming semantics, and sharded-tensor types that bridge ML frameworks to silicon. Work with chip-design and software teams driving DensityAI's AI accelerator program from first silicon through scale-out.
What you'll do- Own MLIR dialect design and lowering passes for our AI accelerator - defining the high-level tensor IR, async / streaming semantics, and sharded-tensor types that bridge ML frameworks to silicon
- Use and develop AI-assisted tool flows to accelerate compiler development
What we're looking for- Exceptional abilities in MLIR dialect design, lowering pass authoring, and rewrite patterns
- 5+ years compiler engineering experience, with hands-on MLIR contributions or equivalent IR-design experience
- Deep understanding of tensor compilation, distributed / sharded execution, and async / streaming dataflow models
- Strong C++ fluency and experience integrating with ML frameworks (PyTorch, JAX, ONNX, TensorFlow, or equivalent)
- (Optional) LLVM backend experience, GPU compiler experience (Triton, IREE, XLA, or equivalent), or open-source MLIR / LLVM contributions
CompensationFinal offers depend on level, location, and skills relevant to the role. Additional compensation: equity grant per company guidelines; medical / dental / vision; 401(k); standard PTO.
Visa SponsorshipDensityAI sponsors qualified candidates for H-1B, O-1, TN, E-3, and other employment-based visas, and we welcome applicants on F-1 OPT and STEM-OPT. Work authorization is required at start; we provide immigration support to secure or transfer status.
Full compensation packages are based on candidate experience and relevant certifications.
California pay range
$200,000-$360,000 USD
