The Chief Systems Engineer (CSE) holds the highest technical authority in the Space Systems Organization below the CTO. This is the single point of accountability for spacecraft system architecture, all Interface Control Documents (ICDs), the Verification & Validation Plan, Requirements Compliance closure, and the system-level AI&T campaign.
With Space Systems Electrical Engineering (SSEE) as an organic fifth function, the CSE also holds sole authority over the spacecraft-level electrical architecture and the electrical ICD framework to which every hardware VP and Semiconductor Development designs. The scope extends beyond the spacecraft - the CSE owns the program digital thread connecting requirements through design, verification, as-built records, and on-orbit telemetry.
This role is the first escalation point for all inter-division technical disputes, the configuration baseline custodian, and the standing CCB member with technical concurrence authority on all production Engineering Change Orders.
What you'll be doing:Systems Architecture & Requirements- Own the System Requirements Document (SRD), all ICDs, and resource budgets (mass, power, pointing, 94V) across the full program lifecycle
- Lead system-level trade studies spanning spacecraft, ground segment, and user terminal interfaces
- Decompose system requirements to subsystem allocations and manage the trade space across mass, power, pointing, and cost
- Baseline all ICDs including the complete electrical ICD set and maintain configuration control through every program gate
Space Systems Electrical Engineering (SSEE)- Own spacecraft-level electrical architecture and design standards; define the electrical ICD framework to which every hardware VP and Semiconductor Development designs
- Exercise dotted-line authority to lead electrical engineers across all hardware VP organizations
- Enforce spacecraft-level power distribution, grounding and shielding, EMI/EMC (MIL-STD-461), signal integrity, and connector/harness standards
Assembly, Integration & Test- Own and execute the G2 Gate receiving process, spacecraft integration, and FlatSat, TVAC, Vibration/Acoustic, and EMI/EMC campaigns
- Own and operate the System Integration Laboratory (SIL) and Hardware-in-the-Loop (HIL) facilities
- Lead anomaly investigation and disposition for all system-level test findings
Verification & Validation- Baseline the V&V Plan at PDR; define and track a minimum of 15 Technical Performance Measures (TPMs) through every gate
- Own the Requirements Compliance Matrix - drive to 100% closure before Phase Close Gate
- Chair the Technical Review Board (TRB) and oversee requirements traceability from SRD to test evidence
Technical Authority & Escalation- Serve as the first escalation point for all inter-division technical disputes across RF, power, structures, software, and semiconductors
- Act as configuration baseline custodian and hold block upgrade architecture authority
- Provide technical concurrence on all production ECOs as standing CCB member
- Make and defend binding technical decisions under uncertainty - including accepting residual risk with documented rationale
Digital Thread & MBSE- Own the program digital thread connecting requirements, design artifacts, verification evidence, as-built records, and on-orbit telemetry
- Drive working-level use of MBSE tools including DOORS NG, Cameo, and SysML across the systems engineering team
What you bring to this role:- 15+ years of progressive systems engineering experience in the space industry; at least one flight project carried from SRR through on-orbit operations
- Constellation program experience - direct accountability for spacecraft-level architecture, cross-vehicle interface management, or system-level verification across a multi-satellite fleet. This is a required differentiator, not a preference
- Direct responsibility for requirements traceability and verification closure; presented and defended technical baselines at formal design reviews (SRR, PDR, CDR, QR) before a standing review board
- Demonstrated background in RF link design, phased array systems, modem/waveform, or OSI Layer 1-2 protocol architecture
- Prior hands-on subsystem leadership (payload, bus, or ground) before transitioning to systems engineering
- Demonstrated record of building and developing multi-discipline systems engineering teams, including recruiting and retaining Principal Engineers
- Experience presenting to and defending technical baselines before external review boards
- Bachelor's or Master's degree in Aerospace, Electrical, or Systems Engineering - or equivalent verifiable experience
Bonus Points for the Following- Experience with MBSE tools (DOORS NG, Cameo, SysML) in a production program environment
- Familiarity with digital thread architectures connecting engineering design to manufacturing execution systems
- Prior experience as CSE or Deputy CSE on a constellation program with 6gt;=10 satellites
- Background in phased array or digital beamforming system architecture
- Familiarity with DCSA or IC program accreditation processes for classified systems
This is a full time, exempt position, based out of our Saratoga office. The target base pay for this position is $190,000- $225,000annually. The total compensation packaged will be determined by various factors such as your relevant job-related knowledge, skills, and experience.
We are redefining how satellites are designed, manufactured and used-so we're looking for candidates with passion, deep knowledge and direct experience on LEO satellite component development, design and in-orbit activities. If that's your experience - then we'll be immediately wow-ed.
This role requires access to controlled technical data. Under U.S. law (ITAR/EAR), we can only consider U.S. persons (U.S. citizens, lawful permanent residents, and individuals granted asylum or refugee status).
E-Space is not currently able to provide employment sponsorship for candidates who do not hold work authorization for the location of this role.
