Overview of RoleAs a Advanced Physical Design and Verification Engineer, you will be responsible for the Design Rule Check, Layout vs. Schematic checking and fix all PDV/EMIR/Noise/SigEM violations and errors. You may also do customization and implementation of top clocks and implement timing ECOs on high performance blocks. You will be reporting to Manager of Advanced Chip implementation team at its San Jose Design Center, California and joining a team of engineers dedicated to pushing the envelope for the world's leading semiconductor company. We are currently operating in a hybrid work schedule with 4 days in office.
Responsibilities- DRC/LVS/ERC/ANTENNA analysis and clean up
- Floorplan analysis and congestion solution
- Power IR/EM analysis and fix
- Signal EM/Noise analysis and fix
- Physical verification sign off
- Implement ECOs for timing closure
- Customized Clock tree structure
- May also perform floorplan, place and route
Minimum Qualifications- Master's degree in Electrical Engineering or Computer Science (Fresh graduate student with limited or no industry experience is welcome to apply).
- In depth knowledge of hardware design courses including VLSI design, digital integrated circuits, logic design, design for testing, computer architecture, and digital design automation.
- Experiences in research projects or internship related to RTL coding, digital design and testing, physical implementation or design verification.
- In depth knowledge of major EDA tools/design flows
- Experience in Python, Perl/TCL language programming
- Ability to work regularly at a Customer site in the South Bay area
Preferred Qualifications- TSMC N16 and below technology
- Chip level integration, and wire editing
- Low-power implementation methodology
- Able to independently complete Netlist-GDS P&R, signoff task
- Experience in block level implementation or chip integration and signoff
Pay Transparency StatementAt TSMC, your base pay is only part of your overall total compensation package. At the time of this posting, this role typically pays a base salary between $85,500 and $134,000/yr. The range displayed reflects the minimum and maximum target for new hires. Actual pay may be more or less than the posted range. Factors that influence pay include the individual's skills, qualifications, education, experience and the position level and location.
TSMC's total compensation package consists of market competitive pay, allowances, bonuses and comprehensive benefits. We also offer extensive development opportunities and programs.
Date: Sep 5, 2026
Country/Region: US
City: San Jose
Company: TSMC Technology, Inc.
