Position OverviewThe VP of Systems owns the development of our inference servers and rack and is responsible for the electrical, mechanical, and systems engineering aspects of designing and delivering our full-scale products. This role will own system development from the boards and interconnect through the end-to-end power and high-speed-channel budgets that make the design close, to full system bring-up. Everything needed to connect our optical processing units (OPUs) together, integrate them into the rack, and ensure the system boots, runs, and passes qualification. Reports to the SVP of Engineering.
LocationAustin, TX or Sunnyvale, CA. Full-time onsite position.
Key Responsibilities- Boards, interconnect & fabric: the accelerator baseboard, module carrier, and front-panel boards (with on-board power and signal & power integrity), the electrical interfaces between modules, the PCIe host interface, and the scale-out fabric (leaf/TOR topology, oversubscription, intra-rack cabling, frontend and management network).
- Electrical closure: the end-to-end power architecture from the rack DC inlet to point-of-load (regulation, transient budget, protection coordination) and the end-to-end high-speed channel budgets across the full link.
- Integration & bring-up: hardware/firmware/software system bring-up and board/system validation.
- System reliability: the top-down system RAS (reliability, availability, serviceability) budget and its flowdown to module allocations.
- Org & program: build and lead the Systems team and own schedule and budget.
- Phase gates: EVT/DVT/PVT design sign-off.
Qualifications- Shipped server/rack products at volume through an ODM/OEM/CM or a hyperscaler/DGX-class program, with design ownership.
- Fluent from L1-L10. From component/PCB through full server-node assembly and validation.
- Extensive direct line management experience and have run a hardware engineering organization from near-scratch to scale.
- Real NPI scars - owned EVT/DVT/PVT gates, spin decisions, and qualification.
- Board & system-electrical depth - layout direction, on-board power, SI/PI, high-speed interfaces (PCIe Gen6/7, Ethernet/OSFP), and validation.
- End-to-end channel & power closure - with owned link budgets for high-speed interfaces (PCIe Gen6/7, 800G+ Ethernet) and an end-to-end power architecture, not just board-level SI/PI.
- Operates well in a defined-interface organization - comfortable owning deep electrical authority while designing to interface definitions and product envelopes set by other teams.
- System-architecture ownership - has owned or led rack/tray/board architecture.
- 15+ years hardware development - BS/MS in EE/ME or equivalent track record.
Preferred Skills- Rack/cluster integration (L11/L12) for AI training/inference deployments.
- Scale-out fabric/networking depth: Ethernet leaf-spine, OSFP, RDMA/RoCE.
- OCP experience: OAM/UBB and ORv3 rack power; contributor a plus.
- 01 startup experience or adjacency to optical/photonic/analog-heavy systems.
What We OfferThis is an opportunity to play a pivotal role in an innovative startup redefining the future of AI hardware. Work on game-changing technology at the intersection of photonics and AI as part of a collaborative, brilliant team. Youll contribute to a platform that redefines computational performance and accelerates the future of artificial intelligence. Come help us bring this transformative technology to the world.
BenefitsJoin a team that invests in your future and your well-being. At Neurophos, we offer:
- 100% coverage of base health plan premiums for you and your dependents, plus HSA contributions.
- Unlimited PTO. No rigid vacation banks, just a focus on delivery.
- 401(k) matching and stock option opportunities to ensure our success is your success.
- Full suite of voluntary benefits, including Dental, Vision, Life, Hospital, Critical Illness, and Accident insurance.
- Personalized Benefits. Choose the plans that fit your life and take the cash back for those that dont.
