Technical Program Manager, Silicon/Hardware

MatX

• $250K — $500K+*
Telecommunications & Hardware
11 - 15 years of experience
Job Overview by Ladders

Qualifications

  • 15+ years in chip/IC development, with 3+ years as a technical program manager.
  • Proven experience leading Silicon HW programs throughout the silicon lifecycle.
  • Ability to drive complex cross-functional programs with tight schedules.
  • Technical knowledge in SoC or chiplet design flows is essential.
  • Strong judgment in managing tradeoffs across multiple metrics.
  • Proficient in managing schedules, dependencies, and risk management.
  • Excellent written and verbal communication skills for technical summaries.

Responsibilities

  • Lead execution of Silicon HW development from concept to production.
  • Collaborate with Architecture, RTL Design, and DV teams to resolve bottlenecks.
  • Define operational processes and stage-gate reviews for the HW group.
  • Develop playbooks for program management across Silicon HW.
  • Oversee silicon planning across various design tradeoffs.
  • Monitor technical dependencies, schedule risks, and program milestones.
  • Act as a liaison between hardware teams and company leadership, providing updates.

Benefits

  • 4 weeks PTO plus 12 company holidays and up to 3 weeks remote work.
  • Company-subsidized healthcare and dental/vision insurance for employees and dependents.
  • Retirement plans with up to 5% company contribution and full life and disability coverage.
  • Annual professional development budget of $1500.
  • Onsite meals provided from Monday to Friday.
  • 100% reimbursed daily commute via Uber or train.
  • Monthly stipend for personal perks and reimbursements for phone and internet.
  • Comprehensive mental health benefits and paid parental leave options.
  • Generous AI resources support for productivity.
Full Job Description
MatX is seeking a Technical Program Manager to join our Silicon/Hardware team as we create best-in-class silicon for high-performance and sustainable GenAI. Successful candidates for this role will be responsible for delivering performant and functionally accurate silicon for MatX products across compute, memory management. High-speed connectivity and other key technologies.

About the Role

You will own the cross-functional execution framework for advanced Silicon HW programs, from early planning through tapeout. You will drive milestones, dependencies, execution reviews, decision-making forums, risk management, and tapeout readiness across multiple engineering teams.

What You'll Do Here
  • Lead end-to-end execution of Silicon HW development programs, from concept through production, driving planning and implementation across cross-functional teams.
  • Partner tightly with Architecture, RTL Design, and Design Verification (DV) teams to identify bottlenecks, track coverage metrics, and mitigate risks before they impact the tapeout schedule.
  • Define the core operational processes and modes of work for the HW group, building and refining the stage-gate reviews required to transition smoothly from architecture into implementation and verification.
  • Develop playbooks and best practices for program management across the Silicon HW organization for cross-functional deliveries.
  • Support silicon planning across performance, power, area, cost, reliability, and manufacturability tradeoffs.
  • Track technical dependencies, schedule risks, owners, closure dates, critical path, program milestones, tapeout readiness, silicon bring-up deliverables, and escalation paths.
  • Manage technical risks related to schedule, design maturity, IP readiness, verification closure, physical signoff, package/test readiness, and supply chain.
  • Act as a liaison between hardware teams and company leadership, providing clear, timely updates and insights.
Who you are
  • 15+ years of experience in chip/IC development as an engineer, engineering manager, or technical program manager, with at least 3 years in a technical program manager role.
  • Experience leading Silicon HW programs through multiple phases of the silicon lifecycle, with end-to-end chip execution from concept to silicon.
  • Experience driving complex cross-functional programs with multiple engineering teams, technical dependencies, external vendors, and tight schedules.
  • Technical fluency in SoC or chiplet design flows - enough to understand RTL milestones, DV signoff, Silicon HW handoffs, and silicon bring-up phases without needing translation.
  • Strong technical judgment with the ability to manage tradeoffs across performance, power, area, cost, schedule, quality, and risk.
  • Ability to drive schedules, dependency management, issue tracking, risk management, milestone governance, and executive-level communication.
  • Experience coordinating design reviews and driving closure across cross-functional engineering teams.
  • Strong written and verbal communication skills, including the ability to summarize technical risks, tradeoffs, decisions, and schedule impact.
  • Proficiency with program-management and engineering collaboration tools such as Jira, GitHub, Confluence, Smartsheet, MS Project, Google Workspace, or equivalent.
Bonus Points If You Have
  • Experience with AI infrastructure, datacenter racks, networking systems, storage systems, or high-power server platforms.
  • Experience coordinating programs involving high-speed interconnects, liquid-cooled systems, telemetry, diagnostics, or rack-scale validation.
  • Prior hands-on engineering experience in BE PD.
Compensation

The US base salary for this full-time position is determined based on a variety of factors including role, experience, location, job related skills, and relevant education and training. Career length is only a guideline for compensation.
  • Early Career - $160,000 - $275,000 + equity
  • Mid Career - $175,000 - $400,000 + equity
  • Senior Career - $250,000 - $600,000 + equity

What We Offer
  • Time off: 4 weeks PTO (accrued) + 12 company Holidays + up to 3 weeks remote work
  • Health: Company-subsidized Medical (Kaiser or Anthem) for employees & dependents, Guardian Dental and Vision insurances for employee & dependents, and life insurance (employee only), plus HSA and FSA offerings via Lively.
  • Financial Wellbeing: Choose from Roth IRA/ 401K (or both) retirement plans with up to 5% company contribution to 401K (even if you don't contribute). Also, 100% company-paid life insurance (up to $300K) and long-term disability insurances.
  • Professional Development: $1500 Professional Development Budget (per year)
  • Team Meals: MatX provides onsite team lunch & dinner Monday - Friday, with your choice of ordering via WeBox, Specialty's or via our reimbursement system
  • Commute on Us: Commute on our company Uber account, or reimburse your train rides. Either way, we pay 100% for your daily commute.
  • MatX E[x]tras: $50/mo to use on the perk you value most
  • Cell & Internet Reimbursement: $35/mo for cellular and $40/mo for wifi
  • Mental Wellbeing: 100% paid mental health benefit via SpringHealth and Guardian EAP.
  • Support to Parents: Up to 12 weeks paid parental leave regardless of path to parenthood, 10 weeks pregnancy disability leave, flexible return-to-work hours, and Benepass reproductive health & parental benefit.
  • AI Resources: Up to $20K/month plus a dedicated internal AI Tooling Team to support your productivity

All candidates must be authorized to work in the United States and work from our offices in Mountain View Tuesdays-Thursdays.

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