Position OverviewWe are looking for a Principal Engineer to lead the design and development of Software Development Kit (SDK), the critical abstraction layer between the hardware and software ecosystems. You will work across Silicon, System and NOS teams to ensure our high-performance switch ASIC are performant and production ready.
Key Responsibilities- Own the SDK architecture for Eridu's custom switch ASICs, including HAL, abstraction layers, API models, and feature programming workflows.
- Design and implement key software interfaces to support dataplane operations like L2/L3 forwarding, ACLs, QOS, buffer management and telemetry.
- Work closely with ASIC architects to translate chip specifications and datapath designs into software-programmable abstractions.
- Enable control plane integration with SONiC stack via OCP SAI or custom APIs.
- Lead bring-up efforts for new silicon, working with firmware and hardware teams to validate functionality in simulation, emulation, and production systems.
- Define and enforce best practices for modular SDK design, automated testing, CI/CD pipelines and benchmarking frameworks
- Mentor junior engineers and influence software direction across the switch software stack.
Required Qualifications- Bachelor's in Computer Science/ECE with 10+ years of experience or Masters in CS/ECE with 5+ years of experience.
- Expertise in L2 and L3 Ethernet switching and routing protocols.
- Coding expertise in Programming languages such as C/C++/Python
- Switch/router embedded system software development experience
- Experience in SDK development for Ethernet switch silicon
- Experience in the following :
- L2 switching/forwarding areas such as LAG, VLAN, xSTP, LLDP, DC fabric switching, etc.
- L3 unicast/multicast routing protocols such as RIP, OSPF, IGMP, BGP, ISIS, etc.
- ACL, QoS, Policers, TCAM, etc.
- 10+ years of hands-on experience building firmware and software abstractions for networking ASICs, SoCs and embedded platforms
- Strong command of C/C++ in Linux-based environments, familiarity with compiler toolchains and tools for profiling network latency and system performance.
- Experience with modern NOS like SONiC and familiarity with simulation environments and behavioral models such as BMv2 and proprietary RTL based ASIC simulations
The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.
The pay range for this role is:
210,000 - 275,000 USD per year (San Francisco Bay Area)
