About the RoleEnCharge AI is looking for a highly motivated and experienced
Staff Physical Design Engineer to drive the physical implementation of our next-generation semiconductor chips. In this role, you will play a critical part in translating complex microarchitectures into high-performance, power-efficient silicon. Working closely with cross-functional teams, you will own block-level and top-level implementation using industry-standard EDA tools, tackle complex timing closure and power challenges, and guide designs all the way from netlist to successful foundry tapeout.
Key Responsibilities- Drive block-level and top-level physical design, including floor-planning, placement, clock tree synthesis (CTS), and routing.
- Achieve aggressive timing, power, and area (PPA) targets through advanced timing closure techniques.
- Perform power grid verification and manage electromigration and IR drop (EM/IR) analysis and resolution.
- Develop and maintain automation scripts (Tcl/Python) to streamline design flows and methodologies.
- Collaborate with physical verification and foundry teams to ensure design rule compliance and successful tapeout execution.
Qualifications and Requirements- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
- 10-15 years of dedicated experience in physical design.
- Strong understanding of EDA implementation flows with extensive experience using Cadence design tools.
- Deep understanding of static timing analysis (STA) concepts and advanced timing closure methodologies.
- Demonstrated success in top-level and block-level physical design, with hierarchical floorplanning expertise a strong plus.
- Proficiency in low-power design techniques, debugging, and EM/IR check resolution/power grid verification.
- Strong scripting skills in Tcl or Python for design flow automation.
- Solid understanding of advanced process nodes and physical verification requirements associated with routing.
- Experience with physical design methodology, flow setup, and advanced flow evaluations.
- Prior experience with PDK management or foundry tapeout processes is highly desirable.
The salary range for this position is $170,000 to $240,000 USD ($170,000 to $230,000 CAD) per year. Actual compensation offered will be determined based on job-related knowledge, skills, and experience.